Package having exposed integrated circuit device

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 8053869
APP PUB NO 20090215244A1
SERIAL NO

12463556

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A package (10) includes an integrated circuit device (12) having an electrically active surface (16) and an opposing backside surface (14). A dielectric molding resin (26) at least partially encapsulates the integrated circuit die and the plurality of electrically conductive leads (20) with the backside surface (14) and the plurality of electrical contacts (24) being exposed on opposing sides of the package (10). Features (30) are formed into electrically inactive portions of the integrated circuit die (12) to seal moisture paths and relieve packaging stress. The features (30) are formed by forming a trough (54) partially through the backside (56) of the wafer (40) in alignment with a saw street (48), the trough (54) having a first width; and forming a channel (62) extending from the trough (54) to the electrically active face (42) to thereby singulate the integrated circuit device member, the channel (62) having a second width that is less than the first width.

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Patent Owner(s)

Patent OwnerAddress
UNISEM (M) BERHAD9TH FLOOR UBN TOWER NO 10 JALAN P RAMLEE KUALA LUMPUR 50250

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Islam, Shafidul Plano, US 16 717
McKerreghan, Michael H Farmers Branch, US 6 196
San, Antonio Romarico S Batam Island, ID 10 345

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