Memory systems and memory modules
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United States of America Patent
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Nov 15, 2011
Grant Date -
Jan 10, 2008
app pub date -
Jun 14, 2007
filing date -
Jun 24, 2005
priority date (Note) -
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Abstract
One embodiment of the present invention sets forth a memory module that includes at least one memory chip, and an intelligent chip coupled to the at least one memory chip and a memory controller, where the intelligent chip is configured to implement at least a part of a RAS feature. The disclosed architecture allows one or more RAS features to be implemented locally to the memory module using one or more intelligent register chips, one or more intelligent buffer chips, or some combination thereof. Such an approach not only increases the effectiveness of certain RAS features that were available in prior art systems, but also enables the implementation of certain RAS features that were not available in prior art systems.
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