Method and system for pipelined processing in an integrated embedded image and video accelerator
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United States of America Patent
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Nov 29, 2011
Grant Date -
Jan 20, 2011
app pub date -
Jul 20, 2010
filing date -
Feb 14, 2006
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Abstract
A method and system for pipelined processing in an integrated embedded image and video accelerator is described. Aspects of a system for pipelined processing in an integrated embedded image and video accelerator may include circuitry that enables pipeline processing of video data within a single chip, wherein the pipeline processing may further include decoding of a block of video data while simultaneously inverse transforming a previously decoded block of video data. Aspects of the system may also include circuitry that enables transformation, within the single chip, of a block of said video data while simultaneously encoding, within said single chip, a previously transformed block of video data.
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