Micro-granular delay testing of configurable ICs
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United States of America Patent
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Dec 6, 2011
Grant Date -
Mar 24, 2011
app pub date -
May 23, 2010
filing date -
Sep 21, 2009
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Abstract
A method for testing a set of circuitry in an integrated circuit (IC) is described. The IC includes multiple configurable circuits for configurably performing multiple operations. The method configures the IC to operate in a user mode with a set of test paths that satisfies a set of evaluation criteria. Each test path includes a controllable storage element for controllably storing a signal that the storage element receives. The method operates the IC in user mode. The method reads the values stored in the storage elements to determine whether the set of circuitry is operating within specified performance limits.
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