Memory with five-transistor bit cells and associated control circuit

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 8072796
APP PUB NO 20080055968A1
SERIAL NO

11929337

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

Memory employing a plurality of five-transistor memory bit cells in a memory matrix and a power supply control circuit that is configured to provide a simultaneous full clear to all of the memory bit cells is described herein.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
META SYSTEMS13-15 RUE JEANNE BRACONNIER - IMMEUBLE LE PASTEUR MEUDON LA FORET 92360

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Barbier, Jean Montpellier, FR 22 592
LePape, Olivier Paris, FR 20 583
Piquet, Philippe Montigny le Bretonneaux, FR 4 5

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation