Multiprocessor system having multiport semiconductor memory with processor wake-up function responsive to stored messages in an internal register
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United States of America Patent
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Dec 13, 2011
Grant Date -
Apr 2, 2009
app pub date -
Sep 23, 2008
filing date -
Sep 28, 2007
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A multiport semiconductor memory device having a processor wake-up function and multiprocessor system, the multiprocessor system including a first processor configured to perform a first predetermined task; a second processor configured to perform a second predetermined task; and a multiport semiconductor memory device coupled to the first and second processors. The multiport semiconductor memory device includes a memory cell array having at least one shared memory area; a first port coupled to the at least one shared memory area; a second port coupled to the at least one shared memory area; and a wake-up signal generator. The first processor is coupled to the at least one shared memory area via the first port, the second processor is coupled to the at least one shared memory area via the second port, and the wake-up signal generator is coupled to the first processor and the second processor.
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