Enhanced microprocessor interconnect with bit shadowing
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United States of America Patent
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Dec 20, 2011
Grant Date -
Jan 7, 2010
app pub date -
Jul 1, 2008
filing date -
Jul 1, 2008
priority date (Note) -
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Abstract
Shadow selection logic is used to select a driver bit position as a shadowed driver value, and line drivers to transmit data for the selected driver bit position and the shadowed driver value on separate link segments of a bus. In addition shadow compare logic is used to compare a selected received value with a shadowed received value from the bus and identify a miscompare in response to a mismatch of the compare, and shadow counters to count a rate of the miscompare relative to a bus error rate over a period of time. A defective link segment is identified in response to the rate of the miscompare within a predefined threshold of the bus error rate.
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