Methods and apparatus for processing scalar and vector instructions
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United States of America Patent
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Jan 3, 2012
Grant Date -
Jul 22, 2004
app pub date -
Jun 28, 2002
filing date -
Jun 28, 2002
priority date (Note) -
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Abstract
In one embodiment of the present invention, a processor includes a scalar computation unit; a vector co-processor coupled to the scalar computation unit; and one or more function-specific engines coupled to the scalar computation unit, where the engines are adapted to minimize data exchange penalties by processing small in-out bit slices.
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