Non-volatile memory and method with write cache partitioning
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United States of America Patent
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Jan 10, 2012
Grant Date -
Jul 8, 2010
app pub date -
Jan 5, 2009
filing date -
Jan 5, 2009
priority date (Note) -
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Abstract
A portion of a nonvolatile memory is partitioned from a main multi-level memory array to operate as a cache. The cache memory is configured to store at less capacity per memory cell and finer granularity of write units compared to the main memory. In a block-oriented memory architecture, the cache has multiple functions, not merely to improve access speed, but is an integral part of a sequential update block system. Decisions to write data to the cache memory or directly to the main memory depend on the attributes and characteristics of the data to be written, the state of the blocks in the main memory portion and the state of the blocks in the cache portion.
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