Modifying an operation of one or more processors executing message passing interface tasks

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United States of America Patent

PATENT NO 8108876
APP PUB NO 20090063885A1
SERIAL NO

11846101

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Mechanisms for modifying an operation of one or more processors executing message passing interface (MPI) tasks are provided. Mechanisms for adjusting the balance of processing work loads of the processors are provided so as to minimize wait periods for waiting for all of the processors to call a synchronization operation. Each processor has an associated hardware implemented MPI load balancing controller. The MPI Load balancing controller maintains a history that provides a profile of the tasks with regard to their calls to synchronization operations. From this information, it can be determined which processors should have their processing loads lightened and which processors are able to handle additional processing loads without significantly negatively affecting the overall operation of the parallel execution system. As a result, operations may be performed to shift workloads from the slowest processor to one or more of the faster processors.

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Patent Owner(s)

Patent OwnerAddress
INTERNATIONAL BUSINESS MACHINES CORPORATIONNEW ORCHARD ROAD ARMONK NY 10504

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Arimilli, Lakshminarayana B Austin, US 76 1521
Arimilli, Ravi K Austin, US 159 3867
Rajamony, Ramakrishnan Austin, US 126 3366
Speight, William E Austin, US 52 1040

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