Integrated circuit system employing back end of line via techniques
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United States of America Patent
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Feb 14, 2012
Grant Date -
Dec 3, 2009
app pub date -
Jun 3, 2008
filing date -
Jun 3, 2008
priority date (Note) -
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Abstract
An integrated circuit system that includes: providing a substrate including front-end-of-line circuitry; forming a first metallization layer over the substrate and electrically connected to the substrate; forming a viabar or a via group over the first metallization layer; and forming a second metallization layer over the first metallization layer and electrically connected to the first metallization layer through either the viabar or the via group.
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