US Patent No: 8,116,026
Number of patents in Portfolio can not be more than 2000
Method and system for head position control in embedded disk drive controllers
Stats
-
Feb 14, 2012
Issued date -
Dec 18, 2008
filing date -
12/338,071
serial no -
In Force
status
Importance
Loading Importance Indicators...
Abstract
A track follow controller includes a burst selector selecting at least one burst pair based on burst pair selection data. A linear position calculator calculates a primary head position and a secondary head position based on the at least one burst pair, and calculates a head linear position based on the primary head position and the secondary head position.
Loading the Abstract Image...
First Claim
Related Publications
Loading Related Publications...
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Cited Art
| Patent Info | (Count) | # Cites | Year |
|---|---|---|---|
|
|
|||
| 5,274,509 On-the-fly splitting of disk data blocks using timed sampling of a data position indicator | 69 | 1992 | |
| 5,465,343 Shared memory array for data block and control program storage in disk drive | 99 | 1993 | |
| 5,758,188 Synchronous DMA burst transfer protocol having the peripheral device toggle the strobe signal such that data is latched using both edges of the strobe signal | 82 | 1995 | |
| 5,729,718 System for determining lead time latency as function of head switch, seek, and rotational latencies and utilizing embedded disk drive controller for command queue reordering | 98 | 1996 | |
| 5,771,131 Tracking in hard disk drive using magnetoresistive heads | 47 | 1996 | |
| 5,796,543 Data track pattern including embedded servo sectors for magneto-resistive read/inductive write head structure for a disk drive | 59 | 1996 | |
| 6,064,542 Methods and apparatus for positioning read/write head in a computer disk drive | 4 | 1997 | |
| 6,101,064 Methods and apparatus for efficiently controlling a read/write head in a computer disk drive | 10 | 1998 | |
| 6,178,486 Time allocation shared memory arbitration for disk drive controller | 86 | 1998 | |
| 6,381,659 Method and circuit for controlling a first-in-first-out (FIFO) buffer using a bank of FIFO address registers capturing and saving beginning and ending write-pointer addresses | 82 | 1999 | |
| 6,785,080 Method and apparatus for providing a variable rate oversampling digital filter for resonance compensation in disk drive servo control systems | 9 | 2001 | |
|
|
|||
| 5,220,569 Disk array with error type indication and selection of error correction method | 77 | 1990 | |
| 5,162,954 Apparatus for generating an index pulse in a data storage system | 45 | 1990 | |
| 5,276,662 Disc drive with improved data transfer management apparatus | 96 | 1992 | |
| 5,600,506 Apparatus and method for determining the position of a transducer relative to a disk surface in a disk drive system | 50 | 1995 | |
| 5,745,793 Apparatus having a circular buffer that maintains a one entry gap between elements written to the microprocessor and elements operated on by the clock | 43 | 1995 | |
| 5,867,341 Disc drive system using multiple pairs of embedded servo bursts | 39 | 1996 | |
| 5,760,990 Servo position error signal calibration in a hard disc drive | 26 | 1996 | |
| 6,157,984 Integrated controller/processor for disc drive having direct memory access | 48 | 1997 | |
| 6,091,567 Modeling position error nonlinearity to improve servo performance | 29 | 1998 | |
| 6,188,539 Extended position error signal linearization and normalization | 5 | 1998 | |
| 6,768,609 Reducing position error signal nonlinearity through iterative calibration of a compensation table | 11 | 2001 | |
|
|
|||
| 4,603,382 Dynamic buffer reallocation | 142 | 1984 | |
| 5,014,186 Data-processing system having a packet transfer type input/output system | 76 | 1988 | |
| 5,506,989 Arbitration system limiting high priority successive grants | 45 | 1990 | |
| 5,146,585 Synchronized fault tolerant clocks for multiprocessor systems | 91 | 1990 | |
| 5,307,216 Sector identification method and apparatus for a direct access storage device | 47 | 1991 | |
| 5,487,170 Data processing system having dynamic priority task scheduling capabilities | 100 | 1993 | |
| 5,519,837 Pseudo-round-robin arbitration for a shared resource system providing fairness and high throughput | 66 | 1994 | |
| 5,544,346 System having a bus interface unit for overriding a normal arbitration scheme after a system resource device has already gained control of a bus | 45 | 1994 | |
| 5,546,545 Rotating priority selection logic circuit | 54 | 1994 | |
| 5,692,135 Method and system for performing an asymmetric bus arbitration protocol within a data processing system | 38 | 1995 | |
|
|
|||
| 5,072,420 FIFO control architecture and method for buffer memory access arbitration | 95 | 1989 | |
| 5,822,142 Method of mapping logical sectors to physical sectors in a disk drive sparing partition | 96 | 1996 | |
| 6,052,250 Disk drive with separately determined servo and data track pitch | 32 | 1997 | |
| 6,067,206 Method and apparatus to compensate for servo wedge rotational offset after a head switch | 50 | 1997 | |
| 6,122,133 Hybrid method of determining a fractional track position of a read transducer in a hard disk drive | 4 | 1998 | |
| 6,223,303 Disk drive having two tiered defect list comprising marginal and reserved data sectors | 76 | 1998 | |
| 6,279,089 Defective data site management through a shared defect management table | 54 | 1999 | |
| 6,490,635 Conflict detection for queued command handling in disk drive controller | 68 | 2000 | |
| 6,710,966 Method for reducing an effect of vibration on a disk drive during a track following operation by adjusting an adaptive-filter gain applied to an acceleration sensor signal | 16 | 2001 | |
|
|
|||
| 5,428,627 Method and apparatus for initializing an ECC circuit | 44 | 1992 | |
| 5,249,271 Buffer memory data flow controller | 89 | 1993 | |
| 5,627,695 System and method for generating unique sector identifiers for an identificationless disk format | 59 | 1995 | |
| 6,092,231 Circuit and method for rapid checking of error correction codes using cyclic redundancy check | 108 | 1998 | |
| 6,487,631 Circuit and method for monitoring sector transfers to and from storage medium | 40 | 1999 | |
| 6,530,000 Methods and systems for arbitrating access to a disk controller buffer memory by allocating various amounts of times to different accessing units | 42 | 1999 | |
| 6,330,626 Systems and methods for a disk controller memory architecture | 76 | 2000 | |
| 6,401,149 Methods for context switching within a disk controller | 114 | 2000 | |
|
|
|||
| 5,500,848 Sector servo data recording disk having data regions without identification (ID) fields | 74 | 1993 | |
| 5,523,903 Sector architecture for fixed block disk drive | 120 | 1993 | |
| 5,615,190 Fixed- block architecture embedded servo disk drive without data identification (ID) regions | 64 | 1995 | |
| 5,937,435 System and method for skip-sector mapping in a data recording disk drive | 76 | 1996 | |
| 6,124,994 System and method for providing nonadjacent redundancy synchronization bytes | 41 | 1997 | |
| 6,917,487 Seamless and untrimmed primary servo burst with secondary servo bursts | 4 | 2002 | |
|
|
|||
| 5,193,197 Apparatus and method for distributed dynamic priority arbitration for access to a shared resource | 65 | 1990 | |
| 5,440,751 Burst data transfer to single cycle data transfer conversion and strobe signal conversion | 58 | 1991 | |
| 5,361,267 Scheme for error handling in a computer system | 78 | 1992 | |
| 5,408,644 Method and apparatus for improving the performance of partial stripe operations in a disk array subsystem | 113 | 1992 | |
| 5,794,073 Arbitration system for a shared DMA logic on a network adapter with a large number of competing priority requests having predicted latency field | 63 | 1997 | |
|
|
|||
| 5,592,404 Versatile error correction system | 50 | 1994 | |
| 5,623,672 Arrangement and method of arbitration for a resource with shared user request signals and dynamic priority assignment | 95 | 1994 | |
| 5,600,662 Error correction method and apparatus for headers | 78 | 1995 | |
| 5,740,466 Flexible processor-driven SCSI controller with buffer memory and local processor memory coupled via separate buses | 91 | 1996 | |
|
|
|||
| 4,412,161 Digital control of servo circuit | 26 | 1981 | |
| 5,285,451 Failure-tolerant mass storage system | 90 | 1992 | |
| 5,315,708 Method and apparatus for transferring data through a staging memory | 67 | 1993 | |
| 5,890,207 High performance integrated cached storage device | 89 | 1996 | |
|
|
|||
| 5,546,548 Arbiter and arbitration process for a dynamic and flexible prioritization | 66 | 1993 | |
| 5,574,867 Fast first-come first served arbitration method | 58 | 1994 | |
| 5,925,135 Clock rate compensation for a low frequency slave device | 50 | 1996 | |
| 5,968,180 Data capture circuit for asynchronous data transfer | 52 | 1997 | |
|
|
|||
| 5,850,422 Apparatus and method for recovering a clock signal which is embedded in an incoming data stream | 72 | 1995 | |
| 6,029,226 Method and apparatus having automated write data transfer with optional skip by processing two write commands as a single write command | 64 | 1996 | |
| 6,081,849 Method and structure for switching multiple contexts in storage subsystem target device | 80 | 1996 | |
| 6,134,063 Automated multi-track transfers | 41 | 1997 | |
|
|
|||
| 5,649,230 System for transferring data using value in hardware FIFO'S unused data start pointer to update virtual FIFO'S start address pointer for fast context switching | 84 | 1995 | |
| 6,094,320 Device and method for compensating for interhead track position offset due to the offset of tracks on disk surfaces | 51 | 1996 | |
| 6,078,447 Staggered servo writing method in a hard disk drive employing staggered servo writing | 40 | 1997 | |
| 6,297,926 Device and method for compensating for interhead track position offset due to the offset of tracks on disk surfaces | 52 | 2000 | |
|
|
|||
| 5,127,098 Method and apparatus for the context switching of devices | 90 | 1989 | |
| 5,339,443 Arbitrating multiprocessor accesses to shared resources | 105 | 1992 | |
| 5,664,121 Dual mode arbitration apparatus and method for reducing latency by allowing the possibility of simultaneous request and access for a shared bus | 41 | 1995 | |
| 5,912,906 Method and apparatus for recovering from correctable ECC errors | 130 | 1997 | |
|
|
|||
| 4,667,286 Method and apparatus for transferring data between a disk and a central processing unit | 57 | 1984 | |
| 5,027,357 ECC/CRC error detection and correction system | 67 | 1988 | |
| 5,157,669 Comparison of an estimated CRC syndrome to a generated CRC syndrome in an ECC/CRC system to detect uncorrectable errors | 70 | 1991 | |
|
|
|||
| 5,892,634 Method and apparatus for heat positioning control in disk storage system | 32 | 1996 | |
| 5,890,210 Magnetic disk apparatus and command processing method thereof | 48 | 1996 | |
| 6,175,465 Head positioning control system for use in a disk storage drive | 6 | 1998 | |
|
|
|||
| 4,805,046 Information recording and reproducing apparatus using sectors divided into a plurality of frames and having means for proper storage of the frame data | 57 | 1986 | |
| 4,949,342 Code error detecting method | 68 | 1988 | |
| 5,051,998 Data block deinterleaving and error correction system | 89 | 1989 | |
|
|
|||
| 5,050,013 Hard sectoring circuit and method for a rotating disk data storage device | 57 | 1990 | |
| 5,068,755 Sector pulse generator for hard disk drive assembly | 54 | 1990 | |
| 5,602,693 Method and apparatus for sensing position in a disk drive | 23 | 1994 | |
|
|
|||
| 5,692,165 Memory controller with low skew control signal | 162 | 1995 | |
| 6,065,053 System for resetting a server | 66 | 1997 | |
| 6,029,250 Method and apparatus for adaptively adjusting the timing offset between a clock signal and digital signals transmitted coincident with that clock signal, and memory device and system using same | 321 | 1998 | |
|
|
|||
| 5,133,062 RAM buffer controller for providing simulated first-in-first-out (FIFO) buffers in a random access memory | 101 | 1990 | |
| 6,192,499 Device and method for extending error correction beyond one sector time | 56 | 1998 | |
| 6,662,334 Method and device for performing error correction on ECC data sectors | 52 | 1999 | |
|
|
|||
| 4,881,232 Method and apparatus for error correction | 77 | 1988 | |
| 4,975,915 Data transmission and reception apparatus and method | 89 | 1989 | |
| 4,972,417 PCM data transmitting apparatus and method | 75 | 1989 | |
|
|
|||
| 4,970,418 Programmable memory state machine for providing variable clocking to a multimode memory | 113 | 1989 | |
| 5,689,656 Dynamic hierarchical arbitration of computer resource access requests | 47 | 1997 | |
|
|
|||
| 5,602,857 Error correction method and apparatus | 72 | 1994 | |
| 6,646,822 Sampled amplitude read channel employing pipelined reads to reduce the gap between sectors | 42 | 1997 | |
|
|
|||
| 5,280,488 Reed-Solomon code system employing k-bit serial techniques for encoding and burst error trapping | 67 | 1990 | |
| 5,491,701 Burst error corrector | 49 | 1994 | |
|
|
|||
| 4,920,535 Demultiplexer system | 51 | 1988 | |
| 5,983,293 File system for dividing buffer areas into different block sizes for system and user data | 57 | 1998 | |
|
|
|||
| 5,563,896 Error correction processor and an error correcting method | 50 | 1995 | |
| 5,640,602 Transferring digital data in units of 2 bytes to increase utilization of a 2-byte-wide bus | 42 | 1995 | |
|
|
|||
| 5,243,471 Method and apparatus for detecting a start of data position in differing tracks | 49 | 1991 | |
| 5,276,564 Programmable start-of-sector pulse generator for a disk drive using embedded servo bursts and split data fields | 69 | 1992 | |
|
|
|||
| 5,285,327 Apparatus for controlling reading and writing in a disk drive | 64 | 1993 | |
| 5,835,930 One or more logical tracks per physical track in a headerless disk drive | 60 | 1996 | |
|
|
|||
| 5,801,998 Dynamic random access memory | 38 | 1996 | |
| 5,831,922 Semiconductor device having a refresh device of a noise reduction type | 45 | 1997 | |
|
|
|||
| 6,470,461 Disk drive controller circuit and method for skipping defective and/or undesired sectors | 56 | 1999 | |
| 6,826,650 Disk controller configured to perform out of order execution of write operations | 42 | 2000 | |
|
|
|||
| 5,068,857 Error correction circuit | 46 | 1989 | |
| 5,361,266 Error correction circuit | 65 | 1993 | |
|
|
|||
| 5,117,442 Methods and circuits for synchronizing signals in a modular redundant fault tolerant computer system | 62 | 1988 | |
| 5,218,564 Layout efficient 32-bit shifter/register with 16-bit interface | 43 | 1991 | |
|
|
|||
| 4,788,608 Head positioning system for positioning a magnetic head on an eccentric target track | 25 | 1986 | |
| 5,257,143 Method and apparatus for positioning head of disk drive using zone-bit-recording | 58 | 1991 | |
|
|
|||
| 5,276,807 Bus interface synchronization circuitry for reducing time between successive data transmission in a system using an asynchronous handshaking | 107 | 1990 | |
| 5,544,180 Error-tolerant byte synchronization recovery scheme | 44 | 1995 | |
|
|
|||
| 4,390,969 Asynchronous data transmission system with state variable memory and handshaking protocol circuits | 81 | 1980 | |
| 5,818,886 Pulse synchronizing module | 41 | 1996 | |
|
|
|||
| 6,070,200 Host adapter having paged data buffers for continuously transferring data between a system bus and a peripheral bus | 94 | 1998 | |
|
|
|||
| 4,451,898 Asynchronous interface message transmission using source and receive devices | 44 | 1981 | |
|
|
|||
| 2009/0132,648 CONTENT DELIVERY AND GLOBAL TRAFFIC MANAGEMENT NETWORK SYSTEM | 4 | 2009 | |
|
|
|||
| 5,572,148 Programmable logic array integrated circuit with general-purpose memory configurable as a random access or FIFO memory | 171 | 1995 | |
|
|
|||
| 5,268,800 Disk drive servosystem using gray code | 44 | 1990 | |
|
|
|||
| 4,807,253 Time-varying trellis-coded modulation formats which are robust in channels with phase variations | 71 | 1987 | |
|
|
|||
| 5,237,593 Sequence synchronisation | 56 | 1990 | |
|
|
|||
| 5,581,715 IDE/ATA CD drive controller having a digital signal processor interface, dynamic random access memory, data error detection and correction, and a host interface | 109 | 1994 | |
|
|
|||
| 4,777,635 Reed-Solomon code encoder and syndrome generator circuit | 80 | 1986 | |
|
|
|||
| 4,866,606 Loosely coupled distributed computer system with node synchronization for precision in real time applications | 82 | 1987 | |
|
|
|||
| 5,488,688 Data processor with real-time diagnostic capability | 181 | 1994 | |
|
|
|||
| 5,841,722 First-in, first-out (FIFO) buffer | 63 | 1997 | |
|
|
|||
| 5,204,859 Method and apparatus for detecting a frame alignment word in a data system | 42 | 1991 | |
|
|
|||
| 6,574,676 System and method for scheduling disk drive commands by expected total access time | 65 | 2000 | |
|
|
|||
| 6,201,655 Rotational storage device | 46 | 1998 | |
|
|
|||
| 5,507,005 Data transferring system between host and I/O using a main buffer with sub-buffers where quantity of data in sub-buffers determine access requests | 53 | 1992 | |
|
|
|||
| 4,587,609 Lockout operation among asynchronous accessers of a shared computer system resource | 120 | 1983 | |
|
|
|||
| 5,991,911 Concurrent generation of ECC error syndromes and CRC validation syndromes in a DVD storage device | 74 | 1997 | |
|
|
|||
| 5,719,516 Lock generator circuit for use with a dual edge register that provides a separate enable for each use of an input clock signal | 41 | 1995 | |
|
|
|||
| 6,041,417 Method and apparatus for synchronizing data received in an accelerated graphics port of a graphics memory system | 46 | 1998 | |
|
|
|||
| 4,275,457 Apparatus and method for receiving digital data at a first rate and outputting the data at a different rate | 48 | 1979 | |
|
|
|||
| 5,907,717 Cross-connected memory system for allocating pool buffers in each frame buffer and providing addresses thereof | 56 | 1996 | |
|
|
|||
| 5,271,018 Method and apparatus for media defect management and media addressing | 189 | 1990 | |
|
|
|||
| 5,088,093 Self-correcting registers, error-detecting/correcting registers, and inversion coding using one bit, and other information storage media | 41 | 1987 | |
|
|
|||
| 4,225,960 Automatic synchronizing system for digital asynchronous communications | 52 | 1979 | |
|
|
|||
| 4,989,190 Apparatus for seeking a track of an optical disk in which information is recorded | 63 | 1988 | |
|
|
|||
| 4,860,333 Error protected central control unit of a switching system and method of operation of its memory configuration | 49 | 1987 | |
|
|
|||
| 5,023,612 Illegal sequence detection and protection circuit | 45 | 1989 | |
|
|
|||
| 5,583,999 Bus arbiter and bus arbitrating method | 58 | 1994 | |
|
|
|||
| 5,420,984 Apparatus and method for rapid switching between control of first and second DMA circuitry to effect rapid switching beween DMA communications | 64 | 1993 | |
|
|
|||
| 5,136,592 Error detection and correction system for long burst errors | 82 | 1989 | |
|
|
|||
| 5,109,500 Disk drive control unit having sets of operating command and operation length information and generating end signal based upon operation length information | 65 | 1987 | |
|
|
|||
| 5,854,918 Apparatus and method for self-timed algorithmic execution | 91 | 1996 | |
|
|
|||
| 6,347,018 Digital servo control system for use in disk drives | 31 | 1999 | |
|
|
|||
| 4,811,282 Retiming circuit for pulse signals, particularly for microprocessor peripherals | 38 | 1986 | |
|
|
|||
| 5,784,569 Guaranteed bandwidth allocation method in a computer system for input/output data transfers | 87 | 1996 | |
|
|
|||
| 5,950,223 Dual-edge extended data out memory | 58 | 1997 | |
|
|
|||
| 4,625,321 Dual edge clock address mark detector | 41 | 1985 | |
|
|
|||
| 6,526,476 Defective data sector management system | 8 | 1999 | |
|
|
|||
| 5,261,081 Sequence control apparatus for producing output signals in synchronous with a consistent delay from rising or falling edge of clock input signal | 51 | 1990 | |
|
|
|||
| 4,486,750 Data transfer system | 51 | 1982 | |
|
|
|||
| 4,807,116 Interprocessor communication | 80 | 1987 | |
|
|
|||
| 4,812,769 Programmable sampling time base circuit | 46 | 1986 | |
|
|
|||
| 6,915,416 Apparatus and method for microcontroller debugging | 18 | 2000 | |
|
|
|||
| 4,809,091 Disk apparatus | 55 | 1987 | |
|
|
|||
| 4,500,926 Data-recording apparatus | 56 | 1982 | |
|
|
|||
| 5,659,437 Data storage apparatus having servo control system | 7 | 1995 | |
|
|
|||
| 5,301,333 Tree structured variable priority arbitration implementing a round-robin scheduling policy | 139 | 1993 | |
|
|
|||
| 5,754,759 Testing and monitoring of programmed devices | 59 | 1996 | |
|
|
|||
| 5,844,844 FPGA memory element programmably triggered on both clock edges | 67 | 1997 | |
|
|
|||
| 5,691,994 Disk drive with fast error correction validation | 67 | 1995 | |
Patent Citation Ranking
Maintenance Fees
| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|---|---|---|---|
| 3.5 Year Payment | $1600.00 | $800.00 | $400.00 | Aug 14, 2015 |
| 7.5 Year Payment | $3600.00 | $1800.00 | $900.00 | Aug 14, 2019 |
| 11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | Aug 14, 2023 |
| Fee | Large entity fee | small entity fee | micro entity fee |
|---|---|---|---|
| Surcharge - 3.5 year - Late payment within 6 months | $160.00 | $80.00 | $40.00 |
| Surcharge - 7.5 year - Late payment within 6 months | $160.00 | $80.00 | $40.00 |
| Surcharge - 11.5 year - Late payment within 6 months | $160.00 | $80.00 | $40.00 |
| Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
| Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |