Reduced pin count interface
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United States of America Patent
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Feb 21, 2012
Grant Date -
Aug 21, 2008
app pub date -
Aug 22, 2007
filing date -
Feb 16, 2007
priority date (Note) -
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status (Latency Note)
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Abstract
An arrangement of memory devices and a controller is based on an interface with a reduced pin count relative to a known memory device and controller arrangement. Facilitating the reduced pin count interface are some operations performed by the controller. The controller determines a width for a Data bus while assigning a target device address to each of the memory devices.
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