Alignment of semiconductor wafer patterns by corresponding edge groups

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United States of America Patent

PATENT NO 8126257
APP PUB NO 20070280541A1
SERIAL NO

11783729

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Abstract

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A pattern shape evaluation method includes acquiring an image of an evaluation target pattern including a plurality of element patterns; detecting edge of the evaluation target pattern from the image; classifying the detected edge of the evaluation target pattern into a plurality of evaluation target pattern edge groups; acquiring edge of a reference pattern serving as an evaluation standard for the element patterns; classifying the edge of the reference pattern into a plurality of reference pattern edge groups; selecting a reference pattern edge group to be aligned with the edge of the evaluation target pattern from the classified reference pattern edge groups; aligning the edge of the selected reference pattern edge group with the edge of the evaluation target pattern; and evaluating the shape of the evaluation target pattern by use of the result of the alignment.

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Patent Owner(s)

Patent OwnerAddress
KABUSHIKI KAISHA TOSHIBAMINATO-KU TOKYO 105-0023

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Mitsui, Tadashi Kamakura, JP 46 885
Miyano, Yumiko Tokyo, JP 16 102

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