Bus systems and reconfiguration methods
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United States of America Patent
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Feb 28, 2012
Grant Date -
Jun 28, 2007
app pub date -
Feb 18, 2003
filing date -
Feb 18, 2002
priority date (Note) -
In Force
status (Latency Note)
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Abstract
A processor chip includes data processing elements that each has dedicated to it a respective switch for dynamically establishing an interconnection between the data processing elements conditional upon verification of a validity of the interconnection, which verification is automatically performed by at least one of the data processing elements to be interconnected.
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