Integral metal structure with conductive post portions

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United States of America Patent

PATENT NO 8129834
APP PUB NO 20100187665A1
SERIAL NO

12321833

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A plurality of FPGA dice is disposed upon a semiconductor substrate. In order to supply the immense power required by the plurality of FPGA dice, power is routed through the semiconductor substrate vertically from thick metal layers and large integral metal structures located on the other side of the semiconductor substrate. Because the semiconductor substrate has a different coefficient of thermal linear expansion than metal layers in contact with the substrate, delamination may occur when the structure is subject to changes in temperature. To prevent delamination of metal layers connected to the semiconductor substrate and in electrical contact with the integral metal structures, the integral metal structures are manufactured with an array of post portions. During changes in temperature, the post portions of the integral metal structures bend and slide relative to metal layers connected to the semiconductor substrate and prevent linear stresses that may otherwise cause delamination.

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Patent Owner(s)

Patent OwnerAddress
MICROSS ADVANCED INTERCONNECT TECHNOLOGY LLC3021 E CORNWALLIS ROAD DURHAM NC 27709

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Conn, Robert O Hakalau, US 67 1911

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