Systems and methods for data stream analysis using embedded design logic
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United States of America Patent
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Mar 6, 2012
Grant Date -
N/A
app pub date -
Sep 12, 2007
filing date -
Sep 12, 2006
priority date (Note) -
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Abstract
Systems and methods are provided for analyzing a data stream device at a packet level. In one embodiment, design logic is embedded within a target data stream processing device such as a networking device or video device. The embedded design logic is configured to start and stop the target data stream processing device and to inject data into the target data stream processing device for evaluation. The embedded design may also be configured to detect a user selected data value in a packet within the target data stream processing device before the packet is transmitted through the device's physical layer or passed up the device's networking stack. In addition, or in another embodiment, at least a portion of the design logic, including the ability to detect the user selected value in the packet, may be located external to the data stream processing device. In one embodiment, a controlled client/server interfaces with the physical layer of the target data stream processing device and provides packet-level analysis of the data stream.
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