Method and system for incorporation of patterns and design rule checking
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United States of America Patent
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Mar 13, 2012
Grant Date -
Jan 4, 2007
app pub date -
May 19, 2006
filing date -
May 20, 2005
priority date (Note) -
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status (Latency Note)
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Abstract
Methods and systems for representing the limitations of a lithographic process using a pattern library instead of, or in addition to, using design rules. The pattern library includes “known good” patterns, which chip fabricators know from experience are successful, and “known bad” patterns, which chip fabricators know to be unsuccessful. The pattern library can be used to contain exceptions to specified design rules, or to replace the design rules completely. In some implementations, the pattern library contains statistical information that is used to contribute to an overall figure of merit for the design. In other implementations, a routing tool may generate a plurality of possible IC layouts, and select one IC layout based on information contained in the pattern library.
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