pFET nonvolatile memory

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United States of America Patent

PATENT NO 8139411
SERIAL NO

13008349

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Abstract

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A non-volatile memory integrated circuit includes multiple memory cells, each memory cell including a first MOS transistor, a first control capacitor, and a first floating gate coupled to the first MOS transistor and the first control capacitor. A first read/write control signal is provided having at least a first state and a second state and coupled the first MOS transistor. When the control signal is in the first state, the memory cell is configured for readout, and when the control signal is in the second state, the memory cell is configured for writing. Both single-ended and differential memory cells are described. Arrays of such nonvolatile memory cells are also described.

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Patent Owner(s)

Patent OwnerAddress
SYNOPSYS INCCALIFORNIA USA CALIFORNIA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Pesavento, Alberto Seattle, US 63 1224

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