Data transfer flows for on-chip folding

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United States of America Patent

PATENT NO 8144512
APP PUB NO 20110149650A1
SERIAL NO

12642649

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Abstract

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A memory system and methods of its operation are presented. The memory system includes a volatile buffer memory and a non-volatile memory circuit, where the non-volatile memory circuit has a first section, where data is stored in a binary format, and a second section, where data is stored in a multi-state format. When writing data to the non-volatile memory, the data is received from a host, stored in the buffer memory, transferred from the buffer memory to into read/write registers of the non-volatile memory circuit, and then written from the read/write registers to the first section of the non-volatile memory circuit using a binary write operation. Portions of the data and then subsequently folded from the first section of the non-volatile memory to the second section of the non-volatile memory, where a folding operation includes reading the portions of the data from multiple locations in the first section into the read/write registers and performing a multi-state programming operation of the portions of the data from the read/write registers into a location the second section of the non-volatile memory. The multi-state programming operations include a first phase and a second phase and one or more of the binary write operations are performed between the phases of the multi-state programming operations.

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Patent Owner(s)

Patent OwnerAddress
SANDISK TECHNOLOGIES INC951 SANDISK DRIVE LEGAL DEP MILPITAS CA 95035

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Avila, Chris Sunnyvale, US 66 1570
Gavens, Lee M Milpitas, US 10 637
Gorobets, Sergey Anatolievich Edinburgh, GB 176 9686
Huang, Jianmin Sunnyvale, US 170 2933
Hutchinson, Neil David Larbert, GB 2 159

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