Multithreading microprocessor with optimized thread scheduler for increasing pipeline utilization efficiency
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United States of America Patent
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Apr 3, 2012
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app pub date -
Jan 8, 2010
filing date -
Feb 4, 2005
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Abstract
A multithreading processor for concurrently executing multiple threads is provided. The processor includes an execution pipeline and a thread scheduler that dispatches instructions of the threads to the execution pipeline. The execution pipeline execution pipeline is configured for generating a thread context (TC) flush indicator associated with a thread context when one or more instructions of the thread context would stall in the execution pipeline. One or more instructions in the pipeline of the thread context associated with the thread context flush signal can be flushed or nullified.
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