US Patent No: 8,156,312

Number of patents in Portfolio can not be more than 2000

Processor chip for reconfigurable data processing, for processing numeric and logic operations and including function and interconnection control units

ALSO PUBLISHED AS: 20080010437

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Abstract

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An expanded arithmetic and logic unit (EALU) with special extra functions is integrated into a configurable unit for performing data processing operations. The EALU is configured by a function register, which greatly reduces the volume of data required for configuration. The cell can be cascaded freely over a bus system, the EALU being decoupled from the bus system over input and output registers. The output registers are connected to the input of the EALU to permit serial operations. A bus control unit is responsible for the connection to the bus, which it connects according to the bus register. The unit is designed so that distribution of data to multiple receivers (broadcasting) is possible. A synchronization circuit controls the data exchange between multiple cells over the bus system. The EALU, the synchronization circuit, the bus control unit, and registers are designed so that a cell can be reconfigured on site independently of the cells surrounding it. A power-saving mode which shuts down the cell can be configured through the function register; clock rate dividers which reduce the working frequency can also be set.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
PACT XPP TECHNOLOGIES AGZURICH82

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Münch, Robert - 12 80
Vorbach, Martin Karlsruhe, DE 204 2708

Cited Art Landscape

Patent Info (Count) # Cites Year
 
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Other [Check patent profile for assignment information] (7)
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