US Patent No: 8,156,312

Number of patents in Portfolio can not be more than 2000

Processor chip for reconfigurable data processing, for processing numeric and logic operations and including function and interconnection control units

ALSO PUBLISHED AS: 20080010437

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

An expanded arithmetic and logic unit (EALU) with special extra functions is integrated into a configurable unit for performing data processing operations. The EALU is configured by a function register, which greatly reduces the volume of data required for configuration. The cell can be cascaded freely over a bus system, the EALU being decoupled from the bus system over input and output registers. The output registers are connected to the input of the EALU to permit serial operations. A bus control unit is responsible for the connection to the bus, which it connects according to the bus register. The unit is designed so that distribution of data to multiple receivers (broadcasting) is possible. A synchronization circuit controls the data exchange between multiple cells over the bus system. The EALU, the synchronization circuit, the bus control unit, and registers are designed so that a cell can be reconfigured on site independently of the cells surrounding it. A power-saving mode which shuts down the cell can be configured through the function register; clock rate dividers which reduce the working frequency can also be set.

Loading the Abstract Image... loading....

First Claim

See full text

all claims..

Related Publications

Loading Related Publications... loading....

Patent Owner(s)

Patent OwnerAddressTotal Patents
PACT XPP TECHNOLOGIES AGZURICH80

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Münch, Robert - 12 74
Vorbach, Martin Karlsruhe, DE 187 2580

Cited Art Landscape

Patent Info (Count) # Cites Year
 
XILINX, INC. (78)
4,706,216 Configurable logic element 491 1985
4,870,302 Configurable electrical circuit having configurable logic elements and configurable interconnects 716 1988
5,343,406 Distributed memory architecture for a configurable logic array and method for using distributed memory 253 1989
RE34363 Configurable electrical circuit having configurable logic elements and configurable interconnects 585 1991
RE34444 Programmable logic device 94 1991
5,243,238 Configurable cellular array 154 1991
5,365,125 Logic cell for field programmable gate array having optional internal feedback and optional cascade 243 1992
5,386,154 Compact logic cell for field programmable gate array chip 61 1992
5,469,003 Hierarchically connectable configurable cellular array 329 1993
5,455,525 Hierarchically-structured programmable logic array and system for interconnecting logic elements in the logic array 373 1993
5,430,687 Programmable logic device including a parallel input device for loading memory cells 204 1994
5,781,756 Programmable logic device with partially configurable memory cells and a method for configuration 72 1994
5,426,378 Programmable logic device which stores more than one configuration and means for switching configurations 426 1994
5,450,022 Structure and method for configuration of a field programmable gate array 57 1994
5,521,837 Timing driven method for laying out a user's circuit onto a programmable integrated circuit device 175 1995
5,491,353 Configurable cellular array 104 1995
5,504,439 I/O interface cell for use with optional pad 82 1995
5,600,597 Register protection structure for FPGA 66 1995
5,701,091 Routing resources for hierarchical FPGA 63 1995
5,748,979 Reprogrammable instruction set accelerator using a plurality of programmable execution units and an instruction page table 129 1995
5,752,035 Method for compiling and executing programs for reprogrammable instruction set accelerator 174 1995
5,583,450 Sequencer for a time multiplexed programmable logic device 150 1995
5,646,545 Time multiplexed programmable logic device 317 1995
5,778,439 Programmable logic device with hierarchical confiquration and state storage 155 1995
5,705,938 Programmable switch for FPGA input/output signals 177 1995
5,642,058 Periphery input/output interconnect structure 57 1995
5,815,004 Multi-buffered configurable logic block output lines in a field programmable gate array 131 1995
5,608,342 Hierarchical programming of electrically configurable integrated circuits 50 1995
5,656,950 Interconnect lines including tri-directional buffer circuits 74 1995
5,675,262 Fast carry-out scheme in a field programmable gate array 59 1995
5,635,851 Read and writable data bus particularly for programmable logic devices 66 1996
5,754,459 Multiplier circuit design for a programmable logic device 144 1996
6,023,564 Data processing system using a flash reconfigurable logic device as a dynamic execution unit for a sequence of instructions 68 1996
5,831,448 Function unit for fine-gained FPGA 109 1996
5,933,023 FPGA architecture having RAM blocks with programmable word length and width and dedicated address and data lines 199 1996
5,821,774 Structure and method for arithmetic function implementation in an EPLD having high speed product term allocation structure 55 1996
5,801,547 Embedded memory for field programmable gate array 136 1996
5,844,422 State saving and restoration in reprogrammable FPGAs 127 1996
6,427,156 Configurable logic block with AND gate for efficient multiplication in FPGAS 75 1997
6,047,115 Method for configuring FPGA memory planes for virtual hardware computation 120 1997
6,011,407 Field programmable gate array with dedicated computer bus interface and method for configuring both 167 1997
5,892,961 Field programmable gate array having programming instructions in the configuration bitstream 208 1997
5,936,424 High speed bus with tree structure for selecting bus driver 98 1997
6,026,481 Microprocessor with distributed registers accessible by programmable logic device 97 1997
6,212,650 Interactive dubug tool for programmable circuits 89 1997
6,049,222 Configuring an FPGA using embedded memory 139 1997
6,230,307 System and method for programming the hardware of field programmable gate arrays (FPGAs) and related reconfiguration resources as if they were software by creating hardware objects 209 1998
6,154,049 Multiplier fabric for use in field programmable gate arrays 125 1998
6,084,429 PLD having a window pane architecture with segmented and staggered interconnect wiring between logic block arrays 242 1998
5,978,260 Method of time multiplexing a programmable logic device 126 1998
6,137,307 Structure and method for loading wide frames of data from a narrow input bus 57 1998
6,172,520 FPGA system with user-programmable configuration ports and method for reconfiguring the FPGA 97 1999
6,198,304 Programmable logic device 78 1999
6,105,105 Data processing system using configuration select logic, an instruction store, and sequencing logic during instruction execution 86 1999
6,144,220 FPGA Architecture using multiplexers that incorporate a logic gate 28 1999
6,263,430 Method of time multiplexing a programmable logic device 75 1999
6,204,687 Method and structure for configuring FPGAS 172 1999
6,434,642 FIFO memory system and method with improved determination of full and empty conditions and amount of data stored 73 1999
RE37195 Programmable switch for FPGA input/output signals 118 2000
6,496,971 Supporting multiple FPGA configuration modes using dedicated on-chip processor 133 2000
6,487,709 Run-time routing for programmable logic devices 196 2000
6,154,048 Structure and method for loading narrow frames of data from a wide input bus 58 2000
6,150,839 Rapidly reconfigurable FPGA having a multiple region architecture with reconfiguration caches useable as data RAM 89 2000
6,421,817 System and method of computation in a programmable logic device using virtual instructions 101 2000
6,201,406 FPGA configurable by two types of bitstreams 58 2000
6,362,650 Method and apparatus for incorporating a multiplier into an FPGA 128 2000
6,373,779 Block RAM having multiple configurable write modes for use in a field programmable gate array 66 2000
6,518,787 Input/output architecture for efficient configuration of programmable input/output cells 98 2000
6,836,842 Method of partial reconfiguration of a PLD in which only updated portions of configuration data are selected for reconfiguring the PLD 39 2001
6,480,954 Method of time multiplexing a programmable logic device 228 2001
6,886,092 Custom code processing in PGA by providing instructions from fixed logic processor portion to programmable dedicated processor portion 68 2001
6,668,237 Run-time reconfigurable testing of programmable logic devices 87 2002
6,476,634 ALU implementation in single PLD logic cell 75 2002
7,038,952 Block RAM with embedded FIFO buffer 55 2004
2005/0144,210 Programmable logic device with dynamic DSP architecture 82 2004
2005/0144,215 Applications of cascading DSP slices 104 2004
2006/0230,094 Digital signal processing circuit having input register blocks 79 2006
2006/0230,096 Digital signal processing circuit having an adder circuit with carry-outs 78 2006
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (36)
4,233,667 Demand powered programmable logic array 84 1978
4,566,102 Parallel-shift error reconfiguration 111 1983
4,992,933 SIMD array processor with global instruction control and reprogrammable instruction decoders 141 1990
5,212,716 Data edge phase sorting circuits 60 1991
5,347,639 Self-parallelizing computer system and method 101 1991
5,590,345 Advanced parallel array processor(APAP) 173 1992
5,590,348 Status predictor for combined shifter-rotate/merge unit 66 1992
5,311,079 Low power, high performance PLA 56 1992
5,794,059 N-dimensional modified hypercube 128 1994
5,513,366 Method and system for dynamically reconfiguring a register file in a vector processor 160 1994
5,475,856 Dynamic multi-mode parallel processing array 312 1994
5,682,491 Selective processing and routing of results among processors controlled by decoding instructions using mask value derived from instruction tag and processor identifier 79 1994
5,659,785 Array processor communication architecture with broadcast processor instructions 56 1995
5,617,577 Advanced parallel array processor I/O connection 56 1995
5,483,620 Learning machine synapse processor system apparatus 84 1995
6,405,185 Massively parallel array processor 53 1995
5,625,836 SIMD/MIMD processing memory element (PME) 115 1995
5,652,529 Programmable array clock/reset resource 61 1995
5,646,544 System and method for dynamically reconfiguring a programmable gate array 279 1995
5,717,943 Advanced parallel array processor (APAP) 161 1995
5,713,037 Slide bus communication functions for SIMD/MIMD array processor 99 1995
5,754,871 Parallel processing system having asynchronous SIMD processing 103 1995
5,978,583 Method for resource control in parallel environments using program organization and run-time support 92 1995
5,737,565 System and method for diallocating stream from a stream buffer 81 1995
5,588,152 Advanced parallel processor including advanced support hardware 154 1995
5,745,734 Method and system for programming a gate array using a compressed configuration bit stream 196 1995
6,311,265 Apparatuses and methods for programming parallel computers 95 1996
5,617,547 Switch network extension of bus architecture 111 1996
6,785,826 Self power audit and control circuitry for microprocessor functional units 69 1996
5,734,921 Advanced parallel array processor computer package 120 1996
6,128,720 Distributed processing array with component processors performing customized interpretation of instructions 78 1997
6,054,873 Interconnect structure between heterogeneous core regions in a programmable array 198 1999
6,321,373 Method for resource control in parallel environments using program organization and run-time support 91 1999
6,542,844 Method and apparatus for tracing hardware states using dynamically reconfigurable test circuits 113 2000
6,829,697 Multiple logical interfaces to a shared coprocessor resource 80 2000
6,961,924 Displaying variable usage while debugging 65 2002
 
INTEL CORPORATION (31)
4,910,665 Distributed processing system including reconfigurable elements 93 1986
5,023,775 Software programmable logic array utilizing "and" and "or" gates 115 1990
5,392,437 Method and apparatus for independently stopping and restarting functional units 206 1992
5,634,131 Method and apparatus for independently stopping and restarting functional units 128 1994
5,889,982 Method and apparatus for generating event handler vectors based on both operating mode and event type 76 1995
5,652,894 Method and apparatus for providing power saving modes to a pipelined processor 101 1995
5,696,976 Protocol for interrupt bus arbitration in a multi-processor system 61 1996
6,389,579 Reconfigurable logic for table lookup 93 1999
6,243,808 Digital data bit order conversion using universal switch matrix comprising rows of bit swapping selector groups 94 1999
6,298,472 Behavioral silicon construct architecture and mapping 128 1999
6,347,346 Local memory unit system with global access for use on reconfigurable chips 133 1999
6,370,596 Logic flag registers for monitoring processing system events 92 1999
6,341,318 DMA data streaming 104 1999
6,606,704 Parallel multithreaded processor with plural microengines executing multiple threads each microengine having loadable microcode 120 1999
6,288,566 Configuration state memory for functional blocks on a reconfigurable chip 97 1999
6,311,200 Reconfigurable program sum of products generator 93 1999
6,349,346 Control fabric unit including associated configuration memory and PSOP state machine adapted to provide configuration address to reconfigurable functional unit 100 1999
6,519,674 Configuration bits layout 81 2000
6,539,477 System and method for control synthesis using a reachable states look-up table 94 2000
6,871,341 Adaptive scheduling of function cells in dynamic reconfigurable logic 65 2000
6,282,627 Integrated processor and programmable data path chip for reconfigurable computing 243 2000
6,708,325 Method for compiling high level programming languages into embedded microprocessor with multiple reconfigurable logic 71 2000
6,392,912 Loading data plane on reconfigurable chip 92 2001
2002/0143,505 Implementing a finite state machine using concurrent finite state machines with delayed communications and no shared control signals 64 2001
2002/0013,861 Method and apparatus for low overhead multithreaded communication in a parallel processing environment 71 2001
2003/0056,091 Method of scheduling in a reconfigurable hardware architecture with multiple hardware configurations 65 2001
2003/0055,861 Multipler unit in reconfigurable chip 86 2001
2003/0052,711 Despreader/correlator unit for use in reconfigurable chip 62 2001
2002/0038,414 Address generator for local system memory in reconfigurable logic chip 61 2001
6,868,476 Software controlled content addressable memory in a general purpose execution datapath 64 2002
7,216,204 Mechanism for providing early coherency detection to enable high performance memory updates in a latency sensitive multithreaded environment 54 2002
 
ALTERA CORPORATION (25)
5,444,394 PLD with selective inputs from local and global conductors 135 1993
5,550,782 Programmable logic array integrated circuits 285 1994
5,473,266 Programmable logic device having fast programmable logic array blocks and a central global interconnect array 110 1994
5,485,103 Programmable logic array with local and global conductors 181 1994
5,537,057 Programmable logic array device with grouped logic regions and three types of conductors 254 1995
5,570,040 Programmable logic array integrated circuit incorporating a first-in first-out memory 179 1995
5,541,530 Programmable logic array integrated circuits with blocks of logic regions grouped into super-blocks 147 1995
5,815,726 Coarse-grained look-up table architecture 212 1995
6,020,758 Partially reconfigurable programmable logic device 104 1996
5,859,544 Dynamic configurable elements for programmable logic devices 112 1996
5,828,229 Programmable logic array integrated circuits 153 1997
6,085,317 Reconfigurable computer architecture using programmable logic devices 151 1997
6,134,166 Programmable logic array integrated circuit incorporating a first-in first-out memory 50 1998
6,247,147 Enhanced embedded logic analyzer 101 1998
6,216,223 Methods and apparatus to dynamically reconfigure the instruction pipeline of an indirect very long instruction word scalable processor 69 1999
6,215,326 Programmable logic device architecture with super-regions having logic regions and a memory region 211 1999
6,658,564 Reconfigurable programmable logic device computer system 90 1999
2001/0032,305 Methods and apparatus for dual-use coprocessing/debug interface 114 2001
7,340,596 Embedded processor with watchdog timer for programmable logic 50 2001
2002/0124,238 Software-to-hardware compiler 54 2001
6,538,470 Devices and methods with programmable logic and digital signal processing regions 190 2001
6,525,678 Configuring a programmable logic device 69 2001
7,000,161 Reconfigurable programmable logic system with configuration recovery mode 58 2002
7,350,178 Embedded processor with watchdog timer for programmable logic 47 2004
7,346,644 Devices and methods with programmable logic and digital signal processing regions 45 2006
 
PACT XPP TECHNOLOGIES AG (20)
5,943,242 Dynamically reconfigurable data processing system 97 1995
6,021,490 Run-time reconfiguration method for programmable units 90 1997
6,038,650 Method for the automatic address generation of modules within clusters comprised of a plurality of these modules 63 1997
6,081,903 Method of the self-synchronization of configurable elements of a programmable unit 89 1997
6,088,795 Process for automatic dynamic reloading of data flow processors (DFPs) and units with two or three-dimensional programmable cell architectures (FPGAs, DPGAs and the like) 76 1997
6,119,181 I/O and memory bus system for DFPs and units with two- or multi-dimensional programmable cell architectures 93 1997
6,425,068 UNIT FOR PROCESSING NUMERIC AND LOGIC OPERATIONS FOR USE IN CENTRAL PROCESSING UNITS (CPUS), MULTIPROCESSOR SYSTEMS, DATA-FLOW PROCESSORS (DSPS), SYSTOLIC PROCESSORS AND FIELD PROGRAMMABLE GATE ARRAYS (EPGAS) 86 1997
6,405,299 Internal bus system for DFPS and units with two- or multi-dimensional programmable cell architectures, for managing large volumes of data with a high interconnection complexity 89 1998
6,728,871 Runtime configurable arithmetic and logic cell 55 1999
6,338,106 I/O and memory bus system for DFPS and units with two or multi-dimensional programmable cell architectures 92 1999
6,542,998 Method of self-synchronization of configurable elements of a programmable module 82 1999
6,526,520 Method of self-synchronization of configurable elements of a programmable unit 61 2000
6,697,979 Method of repairing integrated circuits 102 2000
6,477,643 Process for automatic dynamic reloading of data flow processors (dfps) and units with two-or-three-dimensional programmable cell architectures (fpgas, dpgas, and the like) 147 2000
6,571,381 Method for deadlock-free configuration of dataflow processors and modules with a two- or multidimensional programmable cell structure (FPGAs, DPGAs, etc.) 84 2001
6,513,077 I/O and memory bus system for DFPs and units with two- or multi-dimensional programmable cell architectures 62 2001
7,595,659 Logic cell array and bus system 38 2001
7,028,107 Process for automatic dynamic reloading of data flow processors (DFPS) and units with two- or three- dimensional programmable cell architectures (FPGAS, DPGAS, and the like) 46 2002
6,721,830 I/O and memory bus system for DFPs and units with two- or multi-dimensional programmable cell architectures 58 2002
7,650,448 I/O and memory bus system for DFPS and units with two- or multi-dimensional programmable cell architectures 36 2008
 
HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. (17)
4,663,706 Multiprocessor multisystem communications network 165 1983
5,226,122 Programmable logic system for filtering commands to a microprocessor 111 1987
5,014,193 Dynamically configurable portable computer system 199 1988
5,203,005 Cell structure for linear array wafer scale integration architecture with capability to open boundary I/O bus without neighbor acknowledgement 69 1989
5,287,472 Memory system using linear array wafer scale integration architecture 99 1990
5,353,432 Interactive method for configuration of computer system and circuit boards with user specification of system resources and computer resolution of resource conflicts 102 1991
5,996,083 Microprocessor having software controllable power consumption 225 1995
6,003,143 Tool and method for diagnosing and correcting errors in a computer program 105 1997
5,857,097 Method for identifying reasons for dynamic stall cycles during the execution of a program 89 1997
5,884,075 Conflict resolution using self-contained virtual devices 73 1997
6,125,408 Resource type prioritization in generating a device configuration 77 1997
6,035,371 Method and apparatus for addressing a static random access memory device based on signals for addressing a dynamic memory access device 47 1997
6,157,214 Wiring of cells in logic arrays 48 1999
6,507,947 Programmatic synthesis of processor element arrays 165 1999
6,434,672 Methods and apparatus for improving system performance with a shared cache memory 40 2000
2002/0186,837 Multiple prime number generation using a parallel prime number search algorithm 1 2001
6,782,445 Memory and instructions in computer architecture containing processor and coprocessor 60 2001
 
LATTICE SEMICONDUCTOR CORPORATION (11)
5,233,539 Programmable gate array with improved interconnect structure, input/output structure and configurable logic block 166 1989
5,015,884 Multiple array high performance programmable logic device family 131 1990
5,489,857 Flexible synchronous/asynchronous cell structure for a high density programmable logic device 97 1992
5,422,823 Programmable gate array device having cascaded means for function definition 144 1994
5,485,104 Logic allocator for a programmable logic device 90 1995
5,586,044 Array of configurable logic blocks including cascadable lookup tables 88 1995
5,559,450 Field programmable gate array with multi-port RAM 168 1995
5,587,921 Array of configurable logic blocks each including a look up table having inputs coupled to a first multiplexer and having outputs coupled to a second multiplexer 85 1995
5,892,962 FPGA-based processor 251 1996
6,034,538 Virtual logic system for reconfigurable hardware 138 1998
6,803,787 State machine in a programmable logic device 61 2002
 
ACTEL CORPORATION (9)
5,440,245 Logic module with configurable combinational and sequential blocks 98 1993
5,457,644 Field programmable digital signal processing array integrated circuit 163 1993
5,510,730 Reconfigurable programmable interconnect architecture 113 1995
5,600,265 Programmable interconnect architecture 113 1995
6,150,837 Enhanced field programmable gate array 161 1997
6,211,697 Integrated circuit that includes a field-programmable gate array and a hard gate array having the same underlying structure 147 1999
6,504,398 Integrated circuit that includes a field-programmable gate array and a hard gate array having the same underlying structure 73 2000
6,975,138 Method and apparatus for universal program controlled bus architecture 37 2004
7,382,156 Method and apparatus for universal program controlled bus architecture 37 2005
 
MASSACHUSETTS INSTITUTE OF TECHNOLOGY (9)
5,596,742 Virtual interconnections for reconfigurable logic systems 204 1993
5,440,538 Communication system with redundant links and data bit time multiplexing 78 1993
5,742,180 Dynamically programmable gate array with multiple contexts 278 1995
6,052,773 DPGA-coupled microprocessors 183 1995
5,761,484 Virtual interconnections for reconfigurable logic systems 169 1995
5,956,518 Intermediate-grain reconfigurable processing device 181 1996
6,127,908 Microelectro-mechanical system actuator device and reconfigurable circuits utilizing same 174 1997
5,927,423 Reconfigurable footprint mechanism for omnidirectional vehicles 83 1998
6,266,760 Intermediate-grain reconfigurable processing device 113 1999
 
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. (8)
6,353,841 Reconfigurable processor devices 129 1998
6,523,107 Method and apparatus for providing instruction streams to a processing device 45 1998
6,252,792 Field programmable processor arrays 56 1999
6,262,908 Field programmable processor devices 51 1999
6,567,834 Implementation of multipliers in programmable arrays 50 2000
6,542,394 Field programmable processor arrays 46 2001
6,901,502 Integrated circuit with CPU and FPGA for reserved instructions execution with configuration diagnosis 54 2001
6,820,188 Method and apparatus for varying instruction streams provided to a processing device using masks 46 2003
 
BROADCOM CORPORATION (7)
5,915,123 Method and apparatus for controlling configuration memory contexts of processing elements in a network of multiple context processing elements 152 1997
6,108,760 Method and apparatus for position independent reconfiguration in a network of multiple context processing elements 88 1997
6,122,719 Method and apparatus for retiming in a network of multiple context processing elements 87 1997
6,457,116 Method and apparatus for controlling contexts of multiple context processing elements in a network of multiple context processing elements 148 1999
6,745,317 Three level direct communication connections between neighboring multiple context processing elements 41 1999
6,553,479 Local control of multiple context processing elements with major contexts and minor contexts 108 2002
6,751,722 Local control of multiple context processing elements with configuration contexts 96 2003
 
FUJITSU LIMITED (6)
5,506,998 Parallel data processing system using a plurality of processing elements to process data and a plurality of trays connected to some of the processing elements to store and transfer data 93 1994
5,544,336 Parallel data processing system which efficiently performs matrix and neurocomputer operations, in a negligible data transmission time 87 1995
5,655,069 Apparatus having a plurality of programmable logic processing units for self-repair 155 1996
6,185,256 Signal transmission system using PRD method, receiver circuit for use in the signal transmission system, and semiconductor memory device to which the signal transmission system is applied 64 1998
6,404,224 Chain-connected shift register and programmable logic circuit whose logic function is changeable in real time 150 1999
2009/0085,603 FPGA configuration protection and control using hardware watchdog timer 39 2007
 
RICOH COMPANY, LTD. (6)
5,511,173 Programmable logic array and data processing unit using the same 105 1994
5,794,062 System and method for dynamically reconfigurable computing using a processing unit having changeable internal hardware organization 173 1995
5,854,918 Apparatus and method for self-timed algorithmic execution 103 1996
5,933,642 Compiling system and method for reconfigurable computing 137 1997
6,077,315 Compiling system and method for partially reconfigurable computing 86 1998
6,058,469 System and method for dynamically reconfigurable computing using a processing unit having changeable internal hardware organization 86 1998
 
SAMSUNG ELECTRONICS CO., LTD. (6)
5,655,124 Selective power-down for high performance CPU/system 107 1995
5,732,209 Self-testing multi-processor die with internal compare points 131 1996
5,889,533 First-in-first-out device for graphic drawing engine 47 1997
6,381,624 Faster multiply/accumulator 46 1999
6,438,747 Programmatic iteration scheduling for parallel processors 87 1999
6,425,054 Multiprocessor operation in a multimedia signal processor 67 2000
 
TEXAS INSTRUMENTS INCORPORATED (6)
5,212,777 Multi-processor reconfigurable in single instruction multiple data (SIMD) and multiple instruction multiple data (MIMD) modes and method of operation 326 1989
5,522,083 Reconfigurable multi-processor operating in SIMD mode with one processor fetching instructions for use by remaining processors 200 1994
5,532,957 Field reconfigurable logic/memory array 103 1995
6,279,077 Bus interface buffer control in a microprocessor 97 1997
5,960,193 Apparatus and system for sum of plural absolute differences 98 1997
6,256,724 Digital signal processor with efficiently connectable hardware co-processor 57 1999
 
CADENCE DESIGN SYSTEMS, INC. (5)
5,680,583 Method and apparatus for a trace buffer in an emulation system 79 1994
5,606,698 Method for deriving optimal code schedule sequences from synchronous dataflow graphs 62 1995
6,020,760 I/O buffer circuit with pin multiplexing 99 1997
6,389,379 Converification system and method 142 1998
6,421,808 Hardware design language for the design of integrated circuits 73 1999
 
KABUSHIKI KAISHA TOSHIBA (5)
5,867,691 Synchronizing system between function blocks arranged in hierarchical structures and large scale integrated circuit using the same 92 1993
5,572,710 High speed logic simulation system using time division emulation suitable for large scale logic circuits 85 1993
5,754,820 Microprocessor system with cache memory for eliminating unnecessary invalidation of cache data 68 1995
5,862,403 Continuous data server apparatus and data transfer scheme enabling multiple simultaneous data accesses 75 1996
6,587,939 Information processing apparatus provided with an optimized executable instruction extracting unit for extending compressed instructions 72 2000
 
ATMEL CORPORATION (4)
4,918,440 Programmable logic cell and array 163 1986
5,144,166 Programmable logic cell and array 344 1990
5,894,565 Field programmable gate array with distributed RAM and increased cell utilization 114 1996
6,014,509 Field programmable gate array having access to orthogonal and diagonal adjacent neighboring cells 128 1997
 
MITSUBISHI DENKI KABUSHIKI KAISHA (4)
5,047,924 Microcomputer 68 1988
5,010,401 Picture coding and decoding apparatus using vector quantization 126 1989
5,355,508 Parallel data processing system combining a SIMD unit with a MIMD unit and sharing a common bus, memory, and system controller 109 1992
5,237,686 Multiprocessor type time varying image encoding system and image processor with memory bus control table for arbitration priority 70 1992
 
QUICKLOGIC CORPORATION (4)
5,773,994 Method and apparatus for implementing an internal tri-state bus within a programmable logic circuit 74 1995
5,892,370 Clock network for field programmable gate array 63 1997
6,426,649 Architecture for field programmable gate array 111 2000
6,483,343 Configurable computational unit embedded in a programmable device 223 2000
 
SUN MICROSYSTEMS, INC. (4)
6,240,502 Apparatus for dynamically reconfiguring a processor 67 1997
6,490,695 Platform independent memory image analysis architecture for debugging a computer program 65 1999
6,286,134 Instruction selection in a multi-platform environment 88 1999
6,704,816 Method and apparatus for executing standard functions in a computer system using a field programmable gate array 136 2000
 
FREESCALE SEMICONDUCTOR, INC. (3)
5,561,738 Data processor for executing a fuzzy logic operation and method therefor 90 1994
5,815,715 Method for designing a product having hardware and software components and product therefor 69 1995
5,737,516 Data processing system for performing a debug function and method therefor 151 1995
 
HITACHI, LTD. (3)
5,072,178 Method and apparatus for testing logic circuitry by applying a logical test pattern 103 1990
5,537,601 Programmable digital signal processor for performing a plurality of signal processings 233 1994
5,848,238 Information processing system and logic LSI, detecting a fault in the system or the LSI, by using internal data processed in each of them 70 1997
 
HUGHES ELECTRONICS CORPORATION (3)
4,498,134 Segregator functional plane for use in a modular array processor 107 1982
6,145,072 Independently non-homogeneously dynamically reconfigurable two dimensional interprocessor communication topology for SIMD multi-processors and apparatus for implementing same 128 1994
5,901,279 Connection of spares between multiple programmable devices 63 1996
 
LSI LOGIC CORPORATION (3)
5,475,803 Method for 2-D affine transformation of images 140 1992
5,801,958 Method and system for creating and validating low level description of electronic design from higher level, behavior-oriented description, including interactive system for hierarchical display of control and dataflow information 265 1996
7,043,416 System and method for state restoration in a diagnostic module for a high-speed microprocessor 38 2001
 
NATIONAL SEMICONDUCTOR CORPORATION (3)
5,081,375 Method for operating a multiple page programmable logic device 96 1991
5,336,950 Configuration features in a configurable logic array 210 1993
5,784,636 Reconfigurable computer architecture for use in signal processing applications 258 1996
 
RENESAS ELECTRONICS CORPORATION (3)
5,408,643 Watchdog timer with a non-masked interrupt masked only when a watchdog timer has been cleared 54 1992
6,598,128 Microprocessor having improved memory management unit and cache memory 48 1999
6,400,601 Nonvolatile semiconductor memory device 62 2000
 
ROUND ROCK RESEARCH, LLC (3)
5,247,689 Parallel digital processor including lateral transfer buses with interrupt switches to form bus interconnection segments 116 1990
5,887,162 Memory device having circuitry for initializing and reprogramming a control operation feature 66 1997
6,170,051 Apparatus and method for program level parallelism in a VLIW processor 137 1997
 
SHARP KABUSHIKI KAISHA (3)
5,115,510 Multistage data flow processor with instruction packet, fetch, storage transmission and address generation controlled by destination information 90 1988
5,327,125 Apparatus for and method of converting a sampling frequency according to a data driven type processing 90 1993
5,870,620 Data driven type information processor with reduced instruction execution requirements 50 1996
 
SONY CORPORATION (3)
5,477,525 Data destruction preventing method, recording apparatus provided with data destruction preventing capability, and disc recorded with guard band 50 1993
6,188,650 Recording and reproducing system having resume function 59 1998
7,010,687 Transmission apparatus, reception apparatus, transmission method, reception method and recording medium 41 2001
 
TAROFISS DATA LIMITED LIABILITY COMPANY (3)
6,178,494 Modular, hybrid processor and method for producing a modular, hybrid processor 62 1996
5,802,290 Computer network of distributed virtual computers which are EAC reconfigurable in response to instruction to be executed 218 1996
6,289,440 Virtual computer of plural FPG's successively reconfigured in response to a succession of inputs 92 1999
 
ADVANCED MICRO DEVICES, INC. (2)
5,625,806 Self configuring speed path in a microprocessor with multiple clock option 71 1996
6,298,396 System for loading a current buffer desciptor register with a value different from current value to cause a previously read buffer descriptor to be read again 48 1998
 
AKAMAI TECHNOLOGIES, INC. (2)
2009/0132,648 CONTENT DELIVERY AND GLOBAL TRAFFIC MANAGEMENT NETWORK SYSTEM 26 2009
2009/0132,648 CONTENT DELIVERY AND GLOBAL TRAFFIC MANAGEMENT NETWORK SYSTEM 26 2009
 
Bell Telephone Laboratories, Incorporated (2)
4,590,583 Coin telephone measurement circuitry 52 1982
4,682,284 Queue administration method and apparatus 121 1984
 
CANON KABUSHIKI KAISHA (2)
6,118,724 Memory controller architecture 65 1998
6,507,898 Reconfigurable data cache controller 70 1998
 
CHAMELEON SEMICONDUCTOR (2)
5,966,534 Method for compiling high level programming languages into an integrated processor with reconfigurable logic 176 1997
5,970,254 Integrated processor and programmable data path chip for reconfigurable computing 241 1997
 
Echelon Corporation (2)
5,113,498 Input/output section for an intelligent cell which provides sensing, bidirectional communications and control 125 1990
5,844,888 Network and intelligent cell for providing sensing, bidirectional communications and control 125 1995
 
FUJI XEROX CO., LTD. (2)
5,204,935 Programmable fuzzy logic circuits 88 1992
5,448,186 Field-programmable gate array 147 1994
 
GE FANUC AUTOMATION NORTH AMERICA, INC. (2)
5,109,503 Apparatus with reconfigurable counter includes memory for storing plurality of counter configuration files which respectively define plurality of predetermined counters 101 1989
5,142,469 Method for converting a programmable logic controller hardware configuration and corresponding control program for use on a first programmable logic controller to use on a second programmable logic controller 123 1990
 
GEO SEMICONDUCTOR INC. (2)
4,739,474 Geometric-arithmetic parallel processor 170 1983
5,421,019 Parallel data processor 102 1992
 
GOOGLE INC. (2)
6,076,157 Method and apparatus to force a thread switch in a multithreaded processor 167 1997
6,757,847 Synchronization for system analysis 58 1999
 
HTC CORPORATION (2)
5,706,482 Memory access controller 125 1996
6,219,833 Method of using primary and secondary processors 88 1998
 
Hughes Aircraft Company (2)
5,021,947 Data-flow multiprocessor architecture with three dimensional multistage interconnection network for efficient signal and data processing 257 1990
5,379,444 Array of one-bit processors each having only one bit of memory 69 1994
 
INFINEON TECHNOLOGIES AG (2)
6,717,436 Reconfigurable gate array 95 2002
7,254,649 Wireless spread spectrum communication platform using dynamically reconfigurable logic 54 2005
 
MICRON TECHNOLOGY, INC. (2)
6,105,106 Computer system, memory device and shift register including a balanced switching circuit with series connected transfer gates which are selectively clocked for fast switching times 54 1997
6,516,382 Memory device balanced switching circuit and method of controlling an array of transfer gates for fast switching times 48 2001
 
MICROSOFT CORPORATION (2)
6,748,440 Flow of streaming data through multiple processing modules 47 1999
7,007,096 Efficient splitting and mixing of streaming-data frames for processing through multiple processing modules 52 1999
 
Mitsubishi Electric Semiconductor Software Co., Ltd. (2)
5,657,330 Single-chip microprocessor with built-in self-testing function 79 1995
6,185,731 Real time debugger for a microcomputer 56 1995
 
MOTOROLA, INC. (2)
5,493,239 Circuit and method of configuring a field programmable gate array 142 1995
5,649,179 Dynamic instruction allocation for a SIMD processor 71 1995
 
NEC CORPORATION (2)
4,591,979 Data-flow-type digital processing apparatus 103 1983
2001/0003,834 Interprocessor communication method and multiprocessor 49 2000
 
NORMAN, RICHARD S. (2)
5,801,715 Massively-parallel processor array with outputs from individual processors directly to an external device without involving other processors or a common physical carrier 87 1994
5,748,872 Direct replacement cell fault tolerant architecture 212 1996
 
PACT INFORMATIONSTECHNOLOGIE AG (2)
2004/0015,899 Method for processing data 67 2001
7,210,129 Method for translating programs for reconfigurable architectures 66 2001
 
PACT INFORMATIONSTECHNOLOGIE GMBH (2)
6,480,937 Method for hierarchical caching of configuration data having dataflow processors and modules having two-or multidimensional programmable cell structure (FPGAs, DPGAs, etc.)-- 96 2001
6,687,788 Method of hierarchical caching of configuration data having dataflow processors and modules having two-or multidimensional programmable cell structure (FPGAs, DPGAs , etc.) 70 2002
 
RAYTHEON COMPANY (2)
4,972,314 Data flow signal processor method and apparatus 137 1988
5,386,518 Reconfigurable computer interface and method 65 1993
 
RPX CORPORATION (2)
5,611,049 System for accessing distributed data cache channel at each network node to pass requests and data 303 1994
5,804,986 Memory in a programmable logic device 95 1995
 
SEASOUND, LLC (2)
5,361,373 Integrated circuit computing device comprising a dynamically configurable gate array having a microprocessor and reconfigurable instruction execution means and method therefor 267 1992
5,600,845 Integrated circuit computing device comprising a dynamically configurable gate array having a microprocessor and reconfigurable instruction execution means and method therefor 186 1994
 
The United States of America as represented by the Secretary of the Air Force (2)
5,694,602 Weighted system and method for spatial allocation of a parallel load 63 1996
2002/0045,952 High performance hybrid micro-computer 61 2001
 
U.S. Philips Corporation (2)
5,055,997 System with plurality of processing elememts each generates respective instruction based upon portions of individual word received from a crossbar switch 72 1990
5,659,797 Sparc RISC based computer system including a single chip processor with memory management and DMA units coupled to a DRAM interface 111 1992
 
UNIVERSITY OF KENTUCKY RESEARCH FOUNDATION (2)
6,202,182 Method and apparatus for testing field programmable gate arrays 100 1998
6,631,487 On-line testing of field programmable gate array resources 63 2000
 
UNIVERSITY OF WASHINGTON (2)
5,208,491 Field programmable gate array 389 1992
6,023,742 Reconfigurable computing architecture for providing pipelined data paths 216 1997
 
ZIILABS INC., LTD. (2)
6,977,649 3D graphics rendering with selective read suspend 45 1999
6,847,370 Planar byte memory organization with linear access 53 2002
 
ADELANTE TECHNOLOGIES B.V. (1)
6,044,030 FIFO unit with single pointer 49 1998
 
AGILENT TECHNOLOGIES, INC. (1)
4,720,778 Software debugging analyzer 77 1985
 
ALLEN-BRADLEY COMPANY, INC. (1)
5,428,526 Programmable controller with time periodic communication 75 1993
 
Alliant Computer Systems Corporation (1)
5,099,447 Blocked matrix multiplication for computers with hierarchical memory 66 1990
 
AMERICAN AXLE & MANUFACTURING, INC. (1)
6,802,206 Torsional actuation NVH test method 14 2002
 
ANALOG DEVICES, INC. (1)
5,619,720 Digital signal processor having link ports for point-to-point communication 53 1996
 
ANALOGIC CORPORATION (1)
5,301,344 Multibus sequential processor to perform in parallel a plurality of reconfigurable logic operations on a plurality of data sets 136 1991
 
APPLE INC. (1)
6,434,695 Computer operating system using compressed ROM image in RAM 129 1998
 
APPLIED MICRO CIRCUITS CORPORATION (1)
6,512,804 Apparatus and method for multiple serial data synchronization using channel-lock FIFO buffers optimized for jitter 48 1999
 
ARIX COMPUTER CORPORATION, 821 FOX LANE SAN JOSE, CALIFORNIA 95131 (1)
5,276,836 Data processing device with common memory connecting mechanism 71 1991
 
ARM LIMITED (1)
5,525,971 Integrated circuit 77 1994
 
BSC ACQUISTION, INC. (1)
6,260,179 Cell arrangement evaluating method, storage medium storing cell arrangement evaluating program, cell arranging apparatus and method, and storage medium storing cell arranging program 164 1998
 
CAL. MEDIA, L.L.C. (1)
5,675,743 Multi-media server 82 1995
 
CALIFORNIA INSTITUTE OF TECHNOLOGY (1)
6,038,656 Pipelined completion for asynchronous communication 83 1998
 
CAMBRIDGE MANAGEMENT CORPORATION (1)
5,287,532 Processor elements having multi-byte structure shift register for shifting data either byte wise or bit wise with single-bit output formed at bit positions thereof spaced by one byte 64 1990
 
Carlstedt Elektronik AB (1)
5,555,434 Computing device employing a reduction processor and implementing a declarative language 83 1994
 
COMPUTER UPGRADE CORPORATION (1)
5,034,914 Optical disk data storage method and apparatus with buffered interface 145 1988
 
COMTECH TELECOMMUNICATIONS CORP. (1)
5,532,693 Adaptive data compression system with systolic string matching logic 114 1994
 
CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC. (1)
6,434,699 Encryption processor with shared memory interconnect 115 2000
 
COX COMMUNICATIONS, INC. (1)
5,867,723 Advanced massively parallel computer with a secondary storage device coupled through a secondary storage interface 90 1996
 
CRYSTAL SEMICONDUCTOR CORPORATION (1)
6,055,619 Circuits, system, and methods for processing multiple data streams 124 1997
 
CVSI, INC. (1)
4,761,755 Data processing system and method having an improved arithmetic unit 101 1984
 
CYPRESS SEMICONDUCTOR CORPORATION (1)
6,538,468 Method and apparatus for multiple boot-up functionalities for a programmable logic device (PLD) 103 2000
 
DAIMLERCHRYSLER AG (1)
6,435,054 Shifting device for a manual gear transmission 19 2000
 
Dell USA, L.P. (1)
5,530,946 Processor failure detection and recovery circuit in a dual processor computer system and method of operation thereof 112 1994
 
Deutsche ITT Industries GmbH (1)
5,410,723 Wavefront array processor for blocking the issuance of first handshake signal (req) by the presence of second handshake signal (ack) which indicates the readyness of the receiving cell 117 1993
 
E-SYSTEMS, INC. (1)
4,967,340 Adaptive processing system having an array of individually configurable processing components 188 1988
 
ELBRUS INTERNATIONAL LIMITED (1)
6,301,706 Compiler method and apparatus for elimination of redundant speculative computations from innermost loops 67 1998
 
EXAR CORPORATION (1)
6,633,181 Multi-scale programmable array 80 1999
 
FIFTH GENERATION COMPUTER CORP. (1)
4,860,201 Binary tree parallel processor 217 1986
 
FRANCE TELECOM (1)
5,465,375 Multiprocessor system with cascaded modules combining processors through a programmable logic cell array 125 1993
 
GENERAL DYNAMICS C4 SYSTEMS, INC. (1)
5,999,990 Communicator having reconfigurable resources 209 1998
 
GENERAL SEMICONDUCTOR, INC. (1)
4,414,547 Storage logic array having two conductor data column 78 1981
 
GIGA OPERATIONS CORPORATION (1)
5,857,109 Programmable logic device for real time video processing 111 1995
 
GLOBALFOUNDRIES INC. (1)
5,627,992 Organization of an integrated cache unit for flexible usage in supporting microprocessor operations 62 1995
 
HEWLETT-PACKARD COMPANY (1)
4,852,043 Daisy-chain bus system with truncation circuitry for failsoft bypass of defective sub-bus subsystem 76 1987
 
HIRANUMA, TAKEO (1)
6,188,240 Programmable function block 83 1999
 
HOLOGIC, INC. (1)
6,430,309 Specimen preview and inspection system 62 1998
 
Hudson Soft Co., Ltd. (1)
5,530,873 Method and apparatus for processing interruption 74 1993
 
I-CUBE, INC. (1)
5,960,200 System to transition an enterprise to a distributed infrastructure 282 1996
 
IMEC (1)
6,421,809 Method for determining a storage bandwidth optimized memory organization of an essentially digital device 114 1999
 
INTELLECTUAL VENTURES HOLDING 6 LLC (1)
6,173,434 Dynamically-configurable digital processor using method for relocating logic array modules 76 1997
 
INTELLECTUAL VENTURES II LLC (1)
5,687,325 Application specific field programmable gate array 248 1996
 
INTERGRAPH HARDWARE TECHNOLOGIES COMPANY (1)
5,274,593 High speed redundant rows and columns for semiconductor memories 71 1990
 
INTERSIL CORPORATION (1)
4,498,172 System for polynomial division self-testing of digital networks 105 1982
 
IPG ELECTRONICS 503 LIMITED (1)
5,103,311 Data processing module and video processing system incorporating same 74 1990
 
ISCO, INC. (1)
5,125,801 Pumping system 80 1990
 
ITT CORPORATION (1)
4,852,048 Single instruction multiple data (SIMD) cellular array processing apparatus employing a common bus where a first number of bits manifest a first bus portion and a second number of bits manifest a second bus portion 110 1985
 
KAWASAKI MICROELECTRONICS, INC. (1)
6,437,441 Wiring structure of a semiconductor integrated circuit and a method of forming the wiring structure 102 1998
 
KEYBOARD KOMFORT, INC. (1)
5,966,143 Data allocation into multiple memories for concurrent access 54 1997
 
KONINKLIJKE PHILIPS ELECTRONICS N.V. (1)
2002/0083,308 Data processing device with a configurable functional unit 52 2001
 
KUBOTA U.S.A. INC. (1)
4,959,781 System for assigning interrupts to least busy processor that already loaded same class of interrupt routines 63 1988
 
LATROSSE TECHNOLOGIES, L.L.C. (1)
5,887,165 Dynamically reconfigurable hardware system for real-time control of processes 108 1997
 
LOCKHEED MARTIN CORPORATION (1)
4,901,268 Multiple function data processor 92 1988
 
LOCKHEED MARTIN ROLM MIL-SPEC CORP. (1)
5,418,953 Method for automated deployment of a software program onto a multi-processor architecture 85 1993
 
LUCENT TECHNOLOGIES INC. (1)
6,086,628 Power-related hardware-software co-synthesis of heterogeneous distributed embedded systems 111 1998
 
LUJACK SYSTEMS LLC (1)
5,065,308 Processing cell for fault tolerant arrays 80 1991
 
MAXTOR CORPORATION (1)
5,041,924 Removable and transportable hard disk subsystem 157 1988
 
MENTOR GRAPHICS (HOLDING) LTD. (1)
5,754,827 Method and apparatus for performing fully visible tracing of an emulation 109 1995
 
MENTOR GRAPHICS CORPORATION (1)
5,649,176 Transition analysis and circuit resynthesis method and device for digital circuit modeling 141 1995
 
MICRAL, INC. (1)
5,412,795 State machine having a variable timing mechanism for varying the duration of logical output states of the state machine based on variation in the clock frequency 51 1992
 
MICROPUMP, INC. (1)
5,865,239 Method for making herringbone gears 52 1997
 
MIRALFIN S.R.L. (1)
5,760,602 Time multiplexing a plurality of configuration settings of a programmable switch element in a FPGA 111 1996
 
MORGAN STANLEY & CO., INCORPORATED (1)
6,049,866 Method and system for an efficient user mode cache manipulation using a simulated instruction 63 1996
 
MORPHO TECHNOLOGIES (1)
2003/0123,579 Viterbi convolutional coding method and apparatus 67 2002
 
MUTEX SOLUTIONS, LTD. (1)
6,282,701 System and method for monitoring and analyzing the execution of computer programs 316 1998
 
NANOWIRE LIMITED LIABILITY COMPANY (1)
6,092,174 Dynamically reconfigurable distributed integrated circuit processor and method 128 1998
 
NCR CORPORATION (1)
6,665,758 Software sanity monitor 68 1999
 
NEC ELECTRONICS CORPORATION (1)
5,926,638 Program debugging system for debugging a program having graphical user interface 79 1997
 
NEORAM LLC (1)
5,838,165 High performance self modifying on-the-fly alterable logic FPGA, architecture and method 304 1996
 
NXP B.V. (1)
5,537,580 Integrated circuit fabrication using state machine extraction from behavioral hardware description language 132 1994
 
OKI ELECTRIC INDUSTRY CO., LTD. (1)
4,686,386 Power-down circuits for dynamic MOS integrated circuits 108 1985
 
PACT GMBH (1)
7,237,087 Reconfigurable multidimensional array processor allowing runtime reconfiguration of selected individual array cells 53 2002
 
PANASONIC EUROPE LTD. (1)
6,553,395 Reconfigurable processor devices 56 2001
 
PARALLEL SIMULATION TECHNOLOGY, LLC (1)
5,418,952 Parallel processor cell computer system 135 1992
 
PERFORMANCE SEMICONDUCTOR CORPORATION (1)
4,884,231 Microprocessor system with extended arithmetic logic unit 46 1986
 
PICOCHIP DESIGNS LIMITED (1)
2004/0078,548 Processor architecture 55 2003
 
PIE DESIGNS SYSTEMS, INC. (1)
5,425,036 Method and apparatus for debugging reconfigurable emulation systems 249 1992
 
PRASENDT INVESTMENTS, LLC (1)
5,475,583 Programmable control system including a logic module and a method for programming 92 1992
 
PRINCETON GAMMA-TECH INSTRUMENTS, INC. (1)
5,349,193 Highly sensitive nuclear spectrometer apparatus and method 83 1993
 
PRINCETON UNIVERSITY (1)
5,442,790 Optimizing compiler for computers 171 1994
 
PRINCETON UNIVERSITY, NON-PROFIT ORGANIZATION (1)
4,811,214 Multinode reconfigurable pipeline computer 230 1986
 
QUALCOMM INCORPORATED (1)
7,249,351 System and method for preparing software for execution in a dynamically configurable hardware environment 52 2000
 
QUICKFLEX, INC. (1)
6,539,438 Reconfigurable computing system and method and apparatus employing same 87 1999
 
QUICKTURN DESIGN SYSTEMS, INC. (1)
5,036,473 Method of using electronically reconfigurable logic circuits 274 1989
 
RENESAS TECHNOLOGY CORP. (1)
6,928,523 Synchronous signal producing circuit for controlling a data ready signal indicative of end of access to a shared memory and thereby controlling synchronization between processor and coprocessor 50 2001
 
ROCKWELL COLLINS, INC. (1)
6,374,286 Real time processor capable of concurrently running multiple independent JAVA machines 298 1998
 
SCHLUMBERGER TECHNOLOGIES, INC. (1)
4,882,687 Pixel processor 90 1986
 
SEFTA TRUSTEES LIMITED (1)
5,497,498 Video processing module using a second programmable logic device which reconfigures a first programmable logic device for data transformation 248 1993
 
SGS-THOMSON MICROELECTRONICS LIMITED (1)
5,473,267 Programmable logic device with memory that can store routing data of logic data 160 1995
 
SGS-THOMSON MICROELECTRONICS, INC. (1)
5,128,559 Logic block for programmable logic devices 208 1991
 
SIEMENS AKTIENGESELLSCHAFT (1)
5,043,978 Circuit arrangement for telecommunications exchanges 75 1989
 
SILICON GRAPHICS INTERNATIONAL, CORP. (1)
5,841,973 Messaging in distributed memory multiprocessing system having shell circuitry for atomic control of message storage queue's tail pointer structure in local memory 130 1996
 
SILICON STORAGE TECHNOLOGY, INC. (1)
6,173,419 Field programmable gate array (FPGA) emulator for debugging software 101 1998
 
SNAP-ON TOOLS CORPORATION (1)
5,218,302 Interface for coupling an analyzer to a distributorless ignition system 56 1991
 
SONY PICTURES ENTERTAINMENT INC. (1)
6,539,415 Method and apparatus for the allocation of audio/video tasks in a network system 47 1997
 
SP TECHNOLOGY CORP., 1150 QUAIL LAKE LOOP, COLORADO SPRINGS, CO 80906 A CORP. OF DE (1)
5,303,172 Pipelined combination and vector signal processor 95 1988
 
SP-COMMERCIAL FLIGHT, INC., A DE CORP. (1)
4,791,603 Dynamically reconfigurable array logic 80 1986
 
SRI INTERNATIONAL (1)
6,757,892 Method for determining an optimal partitioning of data among several memories 53 2000
 
STAR SEMICONDUCTOR (1)
5,287,511 Architectures and methods for dividing processing tasks into tasks for a programmable real time signal processor and tasks for a decision making microprocessor interfacing therewith 74 1991
 
SUMITOMO BANK OF NEW YORK TRUST COMPANY (1)
6,378,068 Suspend/resume capability for a protected mode microprocesser 175 1995
 
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. (1)
5,581,731 Method and apparatus for managing video data for faster access by selectively caching video data 50 1994
 
TAYLOR MADE GOLF COMPANY, INC. (1)
5,294,119 Vibration-damping device for a golf club 114 1992
 
The Johns Hopkins University (1)
4,720,780 Memory-linked wavefront array processor 222 1985
 
The United States of America as represented by the Administrator of the National Aeronautics and Space Administration (1)
5,548,773 Digital parallel processor array for optimum path planning 104 1993
 
THE UNIVERSITY OF NORTH CAROLINA AT CHAPEL HILL (1)
6,874,108 Fault tolerant operation of reconfigurable devices utilizing an adjustable system clock 60 2002
 
THESEUS RESEARCH, INC. (1)
4,667,190 Two axis fast access memory 87 1983
 
Thomson-CSF (1)
4,891,810 Reconfigurable computing device 101 1987
 
TM PATENTS, L.P. (1)
5,123,109 Parallel processor including a processor array with plural data transfer arrangements including (1) a global router and (2) a proximate-neighbor transfer system 89 1990
 
TRANSWITCH CORPORATION (1)
6,754,805 Method and apparatus for configurable multi-cell digital signal processing employing global parallel configuration 60 2000
 
UNITED TECHNOLOGIES CORPORATION (1)
4,623,997 Coherent interface with wraparound receive and transmit memories 55 1984
 
UNIVERSITY OF HAWAII (1)
5,574,930 Computer system and method using functional memory 131 1994
 
UNIVERSITY OF SOUTHWESTERN LOUISIANA, A UNIVERSITY OF LA (1)
4,571,736 Digital communication system employing differential coding and sample robbing 54 1983
 
VERISITY DESIGN, INC. (1)
2002/0152,060 Inter-chip communication system 78 2001
 
Versity Design, Inc. (1)
6,321,366 Timing-insensitive glitch-free logic system and method 118 1998
 
VIRGINIA POLYTECHNIC INSTITUTE AND STATE UNIVERSITY (1)
5,828,858 Worm-hole run-time reconfigurable processor field programmable gate array (FPGA) 150 1996
 
VLSI TECHNOLOGY, INC. (1)
5,860,119 Data-packet fifo buffer system with end-of-packet flags 77 1996
 
VTECH INDUSTRIES, INC. (1)
5,696,791 Apparatus and method for decoding a sequence of digitally encoded data 39 1995
 
Walker-Estes Corporation (1)
5,301,284 Mixed-resolution, N-dimensional object space method and apparatus 103 1991
 
Wavetracer, Inc. (1)
5,193,202 Processor array with relocated operand physical address generator capable of data transfer to distant physical processor for each virtual processor while simulating dimensionally larger array processor 90 1990
 
WOLFGANG LERCHE (1)
6,657,457 Data transfer on reconfigurable chip 61 2000
 
XEROX CORPORATION (1)
5,924,119 Consistent packet switched memory bus for shared memory multiprocessors 76 1994
 
Other [Check patent profile for assignment information] (7)
5,535,406 Virtual processor module including a reconfigurable programmable matrix 147 1993
5,675,757 Direct match data flow memory for data driven computing 49 1995
5,734,869 High speed logic circuit simulator 48 1995
6,285,624 Multilevel memory access method 47 2000
6,398,383 Flashlight carriable on one's person 58 2000
2001/0001,860 Adder and multiplier circuits employing logic gates having discrete, weighted inputs and methods of performing combinatorial operations therewith 44 2001
2003/0086,300 FPGA coprocessing system 92 2002

Patent Citation Ranking

Forward Cite Landscape

  • No Forward Cites to Display

Maintenance Fees

Fee Large entity fee small entity fee micro entity fee due date
3.5 Year Payment $1600.00 $800.00 $400.00 Oct 10, 2015
7.5 Year Payment $3600.00 $1800.00 $900.00 Oct 10, 2019
11.5 Year Payment $7400.00 $3700.00 $1850.00 Oct 10, 2023
Fee Large entity fee small entity fee micro entity fee
Surcharge - 3.5 year - Late payment within 6 months $160.00 $80.00 $40.00
Surcharge - 7.5 year - Late payment within 6 months $160.00 $80.00 $40.00
Surcharge - 11.5 year - Late payment within 6 months $160.00 $80.00 $40.00
Surcharge after expiration - Late payment is unavoidable $700.00 $350.00 $175.00
Surcharge after expiration - Late payment is unintentional $1,640.00 $820.00 $410.00