Memory for metal configurable integrated circuits

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United States of America Patent

PATENT NO 8159265
SERIAL NO

12947589

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Abstract

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Memory for a semiconductor device is disclosed. The memory array comprises: a memory cell replicated in rows and columns to form an array; and a plurality of first horizontal decode signals, each horizontal signal common to all the memory cells in a said row; and a plurality of first vertical decode signals, each vertical signal common to all the memory cells in a said column; wherein, said replicated memory cell further comprises: a storage device to store data; and a first decode device to receive a said first horizontal decode signal and a said first vertical decode signal and generate a first local decode signal to access a first unique memory cell in the array.

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Patent Owner(s)

Patent OwnerAddress
MADURAWE RAMINDA UDAYANot Provided

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Madurawe, Raminda Udaya Sunnyvale, US 83 5960

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