Die having embedded circuitry with test and test enable circuitry

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United States of America Patent

PATENT NO 8168970
SERIAL NO

13097352

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Abstract

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Timely testing of die on wafer reduces the cost to manufacture ICs. This disclosure describes a die test structure and process to reduce test time by adding test pads on the top surface of the die. The added test pads allow a tester to probe and test more circuits within the die simultaneously. Also, the added test pads contribute to a reduction in the amount of test wiring overhead traditionally required to access and test circuits within a die, thus reducing die size.

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Patent Owner(s)

Patent OwnerAddress
TEXAS INSTRUMENTS INCORPORATEDDALLAS TX 75265-5474

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Antley, Richard L Richardson, US 20 78
Whetsel, Lee D Parker, US 880 5890

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