Integrated circuit package system with leadframe substrate

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United States of America Patent

PATENT NO 8174120
SERIAL NO

12573110

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Abstract

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An integrated circuit package system is provided. A dual-type leadframe having first and second rows of leads is formed. A first row of bumps is formed on an integrated circuit chip. Solder paste is placed on the first row of leads, and the first row of bumps is pressed into the solder paste on the first row of leads. The solder paste is reflow soldered to form solder and connect the integrated circuit chip to the first row of leads, and the integrated circuit chip, the first row of bumps, the solder, and the leadframe are encapsulated.

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Patent Owner(s)

Patent OwnerAddress
STATS CHIPPAC PTE LTD5 YISHUN STREET 23 SINGAPORE 768442

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Choi, Youngnam Seoul, KR 4 15
Lee, Cheonhee Cheong-ju, KR 7 122

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