High speed operation method for twin MONOS metal bit array

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United States of America Patent

PATENT NO 8174885
APP PUB NO 20110205798A1
SERIAL NO

13068066

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Abstract

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The present invention provides a novel read method of twin MONOS metal bit or diffusion bit structure for high-speed application. In a first embodiment of the present invention, the alternative control gates are set at the same voltage. In a second embodiment of the present invention, all the control gates are set at the operational voltage from the beginning. In both embodiments, the bit line and word gate are used to address the selected memory cell.teh

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Patent Owner(s)

Patent OwnerAddress
HALO LSI INCHILLSBORO OR

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Baba, Yoshitaka Beaverton, US 46 225
Ogura, Nori Hillsboro, US 30 183
Ogura, Seiki Hillsboro, US 132 4013
Ogura, Tomoko Hillsboro, US 54 1043
Saito, Tomoya Beaverton, US 42 508

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