Receiver with clock drift compensation

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 8175202
APP PUB NO 20070036252A1
SERIAL NO

11503408

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Abstract

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A receiver is described including circuitry for deriving at least a first stream of first digitized samples from a received analog signal at a first sampling rate, circuitry for selecting a first sampling point and at least a second sampling point, a demodulator for demodulating first and second symbols from the at least first stream of samples based on the first and the at least second sampling points, and circuitry for determining a value related to a demodulation accuracy for the first and second symbols and for outputting a signal, the circuitry for selecting being adapted to alter the sampling point based on the signal. By assessing a demodulation accuracy in real time clock drift can be compensated. The demodulation accuracy can be a value related to a phase error or an error energy such as EVM or DEVM for each demodulated symbol.

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Patent Owner(s)

Patent OwnerAddress
ST-ERICSSON SA1228 PLAN-LES-OUATES

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Capretta, Pietro Brussels, BE 8 126
Schmit, Jean-Jacques Limelette-Ottignies, BE 6 33
Terryn, Steven Lauwe, BE 8 53

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