Process for running programs on processors and corresponding processor system

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 8176478
APP PUB NO 20080270769A1
SERIAL NO

12147999

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Programs having a given instruction-set architecture are executed on a multiprocessor system comprising a plurality of processors, for example of a VLIW type, each of said processors being able to execute, at each processing cycle, a respective maximum number of instructions. The instructions are compiled as instruction words of given length executable on a first processor. At least some of the instruction words of given length are converted into modified-instruction words executable on a second processor. The operation of modifying comprises in turn at least one operation chosen in the group consisting of: splitting the instruction words into modified-instruction words; and entering no-operation instructions in the modified-instruction words.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
STMICROELECTRONICS S.R.L.AGRATE BRIANZA, MI3044

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Borneo, Antonio Maria Matera, IT 9 154
Pau, Danilo Pietro Sesto San Giovanni, IT 27 143
Rovati, Fabrizio Simone Cinisello Balsamo, IT 12 110

Cited Art Landscape

Patent Info (Count) # Cites Year
 
HANYANG FRAME CO., LTD. (2)
* 7546445 Information processor having delayed branch function with storing delay slot information together with branch history information 2 2003
* 2003/0226,003 Information processor having delayed branch function 4 2003
 
Other [Check patent profile for assignment information] (1)
6988183 Methods for increasing instruction-level parallelism in microprocessors and digital system 61 1999
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (4)
* 5031096 Method and apparatus for compressing the execution time of an instruction stream executing in a pipelined processor 17 1988
* 5951674 Object-code compatible representation of very long instruction word programs 71 1996
6651082 Method for dynamically changing load balance and computer 41 1999
* 2001/0022,842 Method, apparatus and storage medium for adjusting the phase of sound from multiple speaker units 4 2001
 
ADVANCED MICRO DEVICES, INC. (1)
6950926 Use of a neutral instruction as a dependency indicator for a set of instructions 20 2001
 
TM PATENTS, L.P. (1)
* 5129077 System for partitioning a massively parallel computer 99 1990
 
PANASONIC CORPORATION (1)
2004/0039,900 Processor, program conversion apparatus, program conversion method, and computer program 9 2003
 
LUCENT TECHNOLOGIES INC. (1)
* 6272481 Hospital-based integrated medical computer system for processing medical and patient information using specialized functional modules 44 1998
 
U.S. PHILIPS CORPORATION (1)
5787302 Software for producing instructions in a compressed format for a VLIW processor 36 1996
 
HITACHI, LTD. (1)
* 6044450 Processor for VLIW instruction 60 1997
 
INTERGRAPH HARDWARE TECHNOLOGIES COMPANY (1)
6892293 VLIW processor and method therefor 28 1998
 
RPX CLEARINGHOUSE LLC (1)
6792560 Reliable hardware support for the use of formal languages in high assurance systems 12 2000
 
SOCIONEXT INC. (2)
6367067 Program conversion apparatus for constant reconstructing VLIW processor 23 1998
* RE41751 Instruction converting apparatus using parallel execution code 2 2003
 
STMICROELECTRONICS S.R.L. (1)
2004/0059,894 Process for running programs on processors and corresponding processor system 4 2003
 
RENESAS ELECTRONICS CORPORATION (1)
* 5893143 Parallel processing unit with cache memories storing NO-OP mask bits for instructions 20 1996
 
TEXAS INSTRUMENTS INCORPORATED (3)
5634135 Microprocessor with priority determination and priority based instruction selection 9 1991
* 6298370 Computer operating process allocating tasks between first and second processors at run time based upon current processor load 344 1997
* 6799266 Methods and apparatus for reducing the size of code with an exposed pipeline by encoding NOP operations as instruction operands 9 2000
 
MITSUBISHI DENKI KABUSHIKI KAISHA (1)
6615339 VLIW processor accepting branching to any instruction in an instruction word set to be executed consecutively 18 2000
 
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. (1)
* 6219779 Constant reconstructing processor which supports reductions in code size 9 1998
 
STMICROELECTRONICS LIMITED (1)
7062634 Processor and a method for handling and encoding no-operation instructions 4 2002
* Cited By Examiner

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