Semiconductor device and semiconductor memory tester
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United States of America Patent
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May 15, 2012
Grant Date -
Mar 31, 2011
app pub date -
Dec 8, 2010
filing date -
Jun 19, 2007
priority date (Note) -
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Abstract
A semiconductor device, a semiconductor memory tester, and a multi-chip package are provided. The semiconductor device includes a plurality of nonvolatile semiconductor memories; a boosting circuit which generates a boosted voltage for operating the plurality of nonvolatile semiconductor memories; and a boosting circuit controller which controls the operation of the boosting circuit to generate the boosted voltage on the basis of an operation sequence of the plurality of nonvolatile semiconductor memories.
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