Method and system for supporting read operations with CRC for iSCSI and iSCSI chimney

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 8180928
APP PUB NO 20060015655A1
SERIAL NO

11156206

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Certain embodiments of the invention may be found in a method and system for performing SCSI read operations with a CRC via a TCP offload engine. Aspects of the method may comprise receiving an iSCSI read command from an initiator. Data may be fetched from a buffer based on the received iSCSI read command. The fetched data may be zero copied from the buffer to the initiator and a TCP sequence may be retransmitted to the initiator. A digest value may be calculated, which may be communicated to the initiator. An accumulated digest value stored in a temporary buffer may be utilized to calculate a final digest value, if the buffer is posted. The retransmitted TCP sequence may be processed and the fetched data may be zero copied into an iSCSI buffer, if the buffer is posted. The calculated final digest value may be communicated to the initiator.

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First Claim

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Patent Owner(s)

Patent OwnerAddressTotal Patents
AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.SINGAPORE, SG22518

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Elzur, Uri Irvine, US 85 1952
Fan, Kan Frankie Diamond Bar, US 32 322
McDaniel, Scott Villa Park, US 25 370

Cited Art Landscape

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6141705 System for querying a peripheral device to determine its processing capabilities and then offloading specific processing tasks from a host to the peripheral device when needed 183 1998
6904519 Method and computer program product for offloading processing tasks from software to hardware 95 2000
7007103 Method to offload a network stack 76 2002
7181531 Method to synchronize and upload an offloaded network stack connection with a network stack 54 2002
 
NEC ELECTRONICS CORPORATION (1)
5877642 Latch circuit for receiving small amplitude signals 43 1996
 
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5680633 Modular, portable data processing terminal for use in a radio frequency communication network 104 1993
5724361 High performance n:1 multiplexer with overlap control of multi-phase clocks 38 1996
5726588 Differential-to-CMOS level converter having cross-over voltage adjustment 36 1996
5978379 Fiber channel learning bridge, learning half bridge, and protocol 125 1997
6008670 Differential CMOS logic family 31 1997
6061747 System for sending data from-and-to a computer monitor using a high speed serial line 39 1997
6014705 Modular portable data processing terminal having a higher layer and lower layer partitioned communication protocol stack for use in a radio frequency communications network 95 1997
6614796 Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost 165 1998
6862296 Receive deserializer circuit for framing parallel data 34 1999
6850521 Network switch 89 2000
6633936 Adaptive retry mechanism 38 2000
6816932 Bus precharge during a phase of a clock signal to eliminate idle clock cycle 22 2001
6937080 Current-controlled CMOS logic family 33 2002
7212534 Flow based congestion control 45 2002
6911855 Current-controlled CMOS circuit using higher voltage supply in low voltage CMOS process 32 2002
6971006 Security chip architecture and implementations for cryptography acceleration 28 2002
6897697 Current-controlled CMOS circuit using higher voltage supply in low voltage CMOS process 26 2002
6927606 Low voltage differential to single-ended converter 25 2002
6874054 Direct memory access controller system with message-based programming 46 2002
7430171 Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost 31 2003
7009985 Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost 36 2003
7362769 Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost 38 2003
7366190 Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost 23 2003
7385972 Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost 22 2003
2003/0107,996 Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost 37 2003
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2003/0169,753 Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost 40 2003
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2007/0171,914 Flow based congestion control 36 2007
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2009/0074,408 Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost 26 2008
 
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* Cited By Examiner

Patent Citation Ranking

Forward Cite Landscape

Patent Info (Count) # Cites Year
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (2)
9384086 I/O operation-level error checking 0 2015
9354967 I/O operation-level error-handling 0 2015
 
NEC CORPORATION (2)
* 9130886 Communication system, controller, switch, storage managing apparatus and communication method 0 2012
* 2014/0112,344 COMMUNICATION SYSTEM, CONTROLLER, SWITCH, STORAGE MANAGING APPARATUS AND COMMUNICATION METHOD 0 2012
 
NVIDIA CORPORATION (1)
* 8572289 System, method and computer program product for stateless offloading of upper level network protocol operations 3 2006
 
SILICON LABORATORIES INC. (1)
8904076 Coder with snoop mode 0 2012
* Cited By Examiner

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