Arrangement and method for controlling power modes of hardware resources
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United States of America Patent
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May 15, 2012
Grant Date -
Sep 22, 2011
app pub date -
May 27, 2011
filing date -
Dec 4, 2002
priority date (Note) -
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Abstract
A circuit arrangement and method of executing program code which utilize power control instructions capable of dynamically controlling power dissipation of multiple hardware resources during execution of a program by a processor. The processor configured to process such power control instructions and to maintain the power modes of the multiple hardware resources to that specified in an earlier-processed power control instruction, such that subsequently-processed instructions will be processed while the power modes of the multiple hardware resources are set to that specified by the earlier-processed power control instruction.
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