Increased capacity semiconductor package
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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May 22, 2012
Grant Date -
N/A
app pub date -
Jul 31, 2008
filing date -
Jul 31, 2008
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
Disclosed is a lead frame and a semiconductor device including the same. The lead frame is provided with a die pad, and first, second and third lands sequentially arranged on an outer circumferential edge. The lead frame can separate the first and second lands or the die pad and the first land using a plating layer formed on the lead frame as a mask, instead of using a separate mask by etching after the application of the encapsulant. As a result thereof, a plurality of lands can be formed at low cost, in comparison with a conventional method. Additionally, the first, second and third lands are exposed to the outside through a lower portion of an encapsulant, and can be surface mounted on an external device through the first, second and third lands. A plating layer formed on bottom surfaces of the first, second and third lands of the lead frame and a process for separately plating nickel (Ni)/gold (An), Ni/Pd/Au, or tin (Sn) can be omitted so as to easily surface mount the semiconductor device to the external device.
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