Semiconductor device including leadframe having power bars and increased I/O
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United States of America Patent
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May 29, 2012
Grant Date -
N/A
app pub date -
Dec 10, 2010
filing date -
Nov 21, 2008
priority date (Note) -
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Abstract
In accordance with the present invention, there is provided a semiconductor package (e.g., a QFP package) including a uniquely configured leadframe sized and configured to maximize the available number of exposed leads in the semiconductor package. More particularly, the semiconductor package includes a generally planar die pad or die paddle defining multiple peripheral edge segments. In addition, the semiconductor package includes a plurality of leads. Some of these leads include bottom surface portions which, in the completed semiconductor package, are exposed and at least partially circumvent the die pad, with other leads including portions which protrude from respective side surfaces of a package body in the completed semiconductor package. The semiconductor package also includes one or more power bars and/or one or more ground rings which are integral portions of the original leadframe used to fabricate the same.
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