Integrated circuit package system with post-passivation interconnection and integration

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 8188590
APP PUB NO 20070284726A1
SERIAL NO

11843649

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Abstract

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An integrated circuit package system including: providing an integrated circuit die, forming a first layer over the integrated circuit die, forming a bridge on and in the first layer, forming a second layer on the first layer, and forming bump pads on and in the second layer, the bump pads connected to ends of the bridge.

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Patent Owner(s)

Patent OwnerAddress
JCET SEMICONDUCTOR (SHAOXING) CO LTDNO 500 LINJIANG ROAD YUECHENG DISTRICT SHAOXING

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lin, Yaojin Singapore, SG 1 0
Marimuthu, Pandi Chelvam Singapore, SG 45 1836

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