System and method for optimizing interconnections of memory devices in a multichip module
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United States of America Patent
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May 29, 2012
Grant Date -
Mar 3, 2011
app pub date -
Nov 5, 2010
filing date -
Aug 29, 2002
priority date (Note) -
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Abstract
An apparatus and method couples memory devices in a memory module to a memory hub on the module such that signals traveling from the hub to the devices have the same propagation time regardless of which device is involved. The hub receives memory signals from a controller over a high speed data link which the hub translates into electrical data, command and address signals. These signals are applied to the memory devices over busses having equivalent path lengths. The busses may also be used by the memory devices to apply data signals to the memory hub. Such data signals can be converted by the memory hub into memory signals and applied to the controller over the high speed data link. In one example, the memory hub is located in the center of the memory module.
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