Semiconductor device with main memory unit and auxiliary memory unit requiring preset operation
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United States of America Patent
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Jun 5, 2012
Grant Date -
Jun 24, 2010
app pub date -
Dec 17, 2009
filing date -
Dec 18, 2008
priority date (Note) -
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Abstract
A semiconductor device that can implement a method comprising selecting a group of rows of auxiliary cells forming part of an auxiliary memory unit, the auxiliary cells being arranged into rows and columns; driving a plurality of bitlines each connected to a respective column of the auxiliary cells, so as to set each of the auxiliary cells to a first logic state; writing input data to selected ones of a plurality of main cells, wherein each of the auxiliary cells corresponds to a respective set of the main cells; selecting a particular row of auxiliary cells that includes at least one auxiliary cell whose corresponding main cells are among the selected cells; and driving the bitlines so as to set the at least one auxiliary cell to a second logic state different from the first logic state.
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