Microelectronic die packages with metal leads, including metal leads for stacked die packages, and associated systems and methods
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United States of America Patent
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Jun 12, 2012
Grant Date -
Mar 24, 2011
app pub date -
Nov 29, 2010
filing date -
Jul 24, 2007
priority date (Note) -
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Abstract
Microelectronic die packages, stacked systems of die packages, and methods of manufacturing them are disclosed herein. In one embodiment, a system of stacked packages includes a first die package having a bottom side, a first dielectric casing, and first metal leads; a second die package having a top side attached to the bottom side of the first package, a dielectric casing with a lateral side, and second metal leads aligned with and projecting towards the first metal leads and including an exterior surface and an interior surface region that generally faces the lateral side; and metal solder connectors coupling individual first leads to individual second leads. In a further embodiment, the individual second leads have an “L” shape and physically contact corresponding individual first leads. In another embodiment, the individual second leads have a “C” shape and include a tiered portion that projects towards the lateral side of the second casing.
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