Method to avoid malconnections with respect to voltage levels of electronic components of circuit boards during circuit board design
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United States of America Patent
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Jun 12, 2012
Grant Date -
Jul 9, 2009
app pub date -
Jan 5, 2009
filing date -
Jan 8, 2008
priority date (Note) -
Expired
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Abstract
A method to avoid malconnections with respect to voltage levels of electronic components of a circuit board during circuit board design is described, comprising the steps of:
- creation of a Component Specification Library (CSL) comprising at least distinct pinnames and assigned voltage data;creation of groups of pins of components to be connected with each other on a particular voltage level according to the circuit board design;verification of the voltage data of the pins of the components within the particular group.
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