Method to avoid threshold voltage shift in thicker dielectric films
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United States of America Patent
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Jun 19, 2012
Grant Date -
Feb 9, 2006
app pub date -
Oct 3, 2005
filing date -
Dec 26, 1995
priority date (Note) -
Expired
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Abstract
A method of fabricating an integrated circuit having reduced threshold voltage shift is provided. A nonconducting region is formed on the semiconductor substrate and active regions are formed on the semiconductor substrate. The active regions are separated by the nonconducting region. A barrier layer and a dielectric layer are deposited over the nonconducting region and over the active regions. Heat is applied to the integrated circuit causing the barrier layer to anneal.
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