Methods and systems for emulating a synchronous clear port
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United States of America Patent
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Jul 10, 2012
Grant Date -
N/A
app pub date -
Aug 3, 2009
filing date -
Aug 3, 2009
priority date (Note) -
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Abstract
A synchronous clear emulation circuit is provided. The synchronous clear emulation circuit includes a register having an asynchronous clear port. Moreover, the synchronous clear emulation circuit is configured to emulate a synchronous clear port by using the asynchronous clear port. The synchronous clear port is emulated by outputting a data output signal that is synchronous with the clock signal and the data output signal is based on an asynchronous clear signal received at the asynchronous clear port. The asynchronous clear port performs a function of the asynchronous clear port without the synchronous clear port implemented within the register.
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