Work balancing scheduler for processor cores and methods thereof

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United States of America Patent

PATENT NO 8219994
APP PUB NO 20100107166A1
SERIAL NO

12256703

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Abstract

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A data processing device assigns tasks to processor cores in a more distributed fashion. In one embodiment, the data processing device can schedule tasks for execution amongst the processor cores in a pseudo-random fashion. In another embodiment, the processor core can schedule tasks for execution amongst the processor cores based on the relative amount of historical utilization of each processor core. In either case, the effects of bias temperature instability (BTI) resulting from task execution are distributed among the processor cores in a more equal fashion than if tasks are scheduled according to a fixed order. Accordingly, the useful lifetime of the processor unit can be extended.

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Patent Owner(s)

Patent OwnerAddress
MEDIATEK INCHSINCHU CITY 30078

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Topaloglu, Rasit O Santa Clara, US 44 250

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