Integrated semiconductor substrate structure using incompatible processes

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 8222086
APP PUB NO 20110183469A1
SERIAL NO

13065976

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A plurality of FPGA dice is disposed upon a semiconductor substrate. In order both to connect thousands of signal interconnect lines between the plurality of FPGA dice and to supply the immense power required, it is desired that the substrate construction include two different portions, each manufactured using incompatible processes. The first portion is a signal interconnect structure containing a thin conductor layers portion characterized as having a plurality of thin, fine-pitch conductors. The second portion is a power connection structure that includes thick conductors and vertical through-holes. The through-holes contain conductive material and supply power to the FPGA dice from power bus bars located at the other side of the semiconductor substrate. The portions are joined at the wafer level by polishing the wafer surfaces within a few atoms of flatness and subsequent cleaning. The portions are then fusion bonded together or combined using an adhesive material.

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Patent Owner(s)

Patent OwnerAddress
MICROSS ADVANCED INTERCONNECT TECHNOLOGY LLC3021 E CORNWALLIS ROAD DURHAM NC 27709

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Conn, Robert O Laupahoehoe, US 67 1911

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