Methods and apparatus for reducing defect bits in phase change memory
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United States of America Patent
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Aug 7, 2012
Grant Date -
Dec 30, 2010
app pub date -
Mar 2, 2010
filing date -
Jun 25, 2009
priority date (Note) -
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Abstract
Phase change memory devices and methods for operating described herein are based on the discovery that, following an initial high current operation applied to a phase change memory cell to establish the high resistance reset state, the current-voltage (I-V) behavior of the memory cell under different bias voltages can be used to detect if the memory cell is a defect cell having poor data retention characteristics.
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