Method and apparatus for simulating a circuit using timing insensitive glitch-free (TIGF) logic
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United States of America Patent
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Aug 14, 2012
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N/A
app pub date -
Sep 12, 2001
filing date -
Aug 31, 1998
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Abstract
The debug system described in this patent specification provides a system that generates hardware elements from normally non-synthesizable code elements for placement on an FPGA device. This particular FPGA device is called a Behavior Processor. This Behavior Processor executes in hardware those code constructs that were previously executed in software. When some condition is satisfied (e.g., If . . . then . . . else loop) which requires some intervention by the workstation or the software model, the Behavior Processor works with an Xtrigger device to send a callback signal to the workstation for immediate response.
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