Memory circuit system and method
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United States of America Patent
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Aug 14, 2012
Grant Date -
Jan 22, 2009
app pub date -
Oct 30, 2007
filing date -
Jul 31, 2006
priority date (Note) -
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Abstract
A memory circuit system and method are provided in the context of various embodiments. In one embodiment, an interface circuit remains in communication with a plurality of memory circuits and a system. The interface circuit is operable to interface the memory circuits and the system for performing various functionality (e.g. power management, simulation/emulation, etc.).
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