Memory-module controller, memory controller and corresponding memory arrangement and also method for error correction

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United States of America Patent

PATENT NO 8250436
APP PUB NO 20120110414A1
SERIAL NO

13287488

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Abstract

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A memory arrangement comprises a first memory module and a second memory module. An item of information to be written to the memory arrangement is written with a first address both to the first memory module and to the second memory module. When reading, the item of information is read either from the first memory module by means of the first address or from the second memory module by means of a second address differing from the first address. Subsequently a check is made as to whether the item of information is defective. If this is the case, the item of information is read from the respective other memory module.

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Patent Owner(s)

  • POLARIS INNOVATIONS LIMITED

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hinz, Torsten Munich, DE 27 326
Risse, Gerhard Munich, DE 11 83

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