Nonvolatile semiconductor memory device generating different write pulses to vary resistances
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United States of America Patent
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Sep 4, 2012
Grant Date -
Dec 30, 2010
app pub date -
Sep 9, 2008
filing date -
Oct 17, 2007
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Abstract
A nonvolatile semiconductor memory device comprises a memory cell array of electrically erasable programmable nonvolatile memory cells arranged in matrix, each memory cell using a variable resistor. A pulse generator is operative to generate plural types of write pulses for varying the resistance of the variable resistor in three or more stages based on ternary or higher write data. A selection circuit is operative to select a write target memory cell from the memory cell array based on a write address and supply the write pulse generated from the pulse generator to the selected memory cell.
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