Method for even utilization of a plurality of flash memory chips
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United States of America Patent
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Sep 4, 2012
Grant Date -
Dec 2, 2010
app pub date -
Nov 26, 2007
filing date -
Nov 26, 2007
priority date (Note) -
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Abstract
A method for addressing a memory having a plurality of flash memory chips organized in erasable blocks, which in turn contain writable sectors, and where an erase counter is associated with each memory block. The overwriting of the sectors occurs by way of alternative memory blocks searched in the same chip for low erase counter values, as long as a threshold value of the erase counter is not exceeded. The copying operations are conducted efficiently using a copy command internal to the memory chip. As soon as the threshold value is exceeded, alternative memory blocks are searched in other memory chips as well.
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