Methods, circuits and systems for reading non-volatile memory cells
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United States of America Patent
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Sep 11, 2012
Grant Date -
Dec 31, 2009
app pub date -
Sep 16, 2007
filing date -
Sep 12, 2006
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Abstract
The present invention includes methods, circuits and systems for reading non-volatile memory (“NVM”) cells, including multi-level NVM cells. According to some embodiments of the present invention, there may be provided a NVM cell threshold voltage detection circuit adapted to detect an approximate threshold voltage associated with a charge storage region of a NVM cell, where the NVM cell may be a single or a multi-charge storage region cell. A decoder circuit may be adapted to decode and/or indicate the logical state of a NVM cell charge storage region by mapping or converting a detected approximate threshold voltage of the charge storage region into a logical state value.
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