Method and apparatus for computing a sliding sum of absolute differences

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United States of America Patent

PATENT NO 8270478
APP PUB NO 20100202518A1
SERIAL NO

12295457

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Abstract

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A logic circuit is configured to calculate a sliding sum of absolute differences of a plurality of numbers from a plurality of members respectively selected successively from all members of a sequence of numbers. The logic circuit reduces an amount of logic that is required to perform the sum of absolute differences, and thereby saves resources and latency.

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Patent Owner(s)

  • ERICSSON AB

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Huggett, Anthony Richard Basingstoke, GB 15 60

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